riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-06-21	target/arm: Implement MVE VDUP	Peter Maydell	4	-0/+55
2021-06-21	tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64	Peter Maydell	3	-11/+18
2021-06-21	target/arm: Implement MVE VNEG	Peter Maydell	4	-0/+35
2021-06-21	target/arm: Implement MVE VABS	Peter Maydell	4	-0/+37
2021-06-21	target/arm: Implement MVE VMVN (register)	Peter Maydell	4	-0/+14
2021-06-21	target/arm: Implement MVE VREV16, VREV32, VREV64	Peter Maydell	4	-0/+51
2021-06-21	target/arm: Implement MVE VCLS	Peter Maydell	4	-0/+13
2021-06-21	target/arm: Implement MVE VCLZ	Peter Maydell	4	-0/+132
2021-06-21	target/arm: Implement widening/narrowing MVE VLDR/VSTR insns	Peter Maydell	4	-2/+58
2021-06-21	target/arm: Implement MVE VLDR/VSTR (non-widening forms)	Peter Maydell	7	-0/+351
2021-06-21	target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()	Peter Maydell	3	-14/+11
2021-06-21	target/arm: Split vfp_access_check() into A and M versions	Peter Maydell	1	-30/+47
2021-06-21	target/arm: Factor FP context update code out into helper function	Peter Maydell	1	-46/+58
2021-06-21	target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access	Peter Maydell	1	-30/+72
2021-06-21	target/arm: Don't NOCP fault for FPCXT_NS accesses	Peter Maydell	5	-528/+542
2021-06-21	target/arm: Handle FPU being disabled in FPCXT_NS accesses	Peter Maydell	1	-2/+30
2021-06-21	target/arm/translate-vfp.c: Whitespace fixes	Peter Maydell	1	-6/+5
2021-06-21	docs/system/arm: Document which architecture extensions we emulate	Peter Maydell	2	-0/+108
2021-06-21	target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors	Peter Maydell	1	-5/+1
2021-06-21	hw/acpi: Provide function acpi_ghes_present()	Peter Maydell	3	-0/+31
2021-06-21	hw/acpi: Provide stub version of acpi_ghes_record_errors()	Peter Maydell	2	-3/+20
2021-06-21	Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/python-pull-request' ...	Peter Maydell	15	-1154/+1712
2021-06-21	Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request'...	Peter Maydell	34	-2073/+3174
2021-06-21	MAINTAINERS: Add qtest/arm-cpu-features.c to ARM TCG CPUs section	Philippe Mathieu-Daudé	1	-0/+1
2021-06-21	s390x/css: Add passthrough IRB	Eric Farman	4	-1/+23
2021-06-21	s390x/css: Refactor IRB construction	Eric Farman	4	-16/+33
2021-06-21	s390x/css: Split out the IRB sense data	Eric Farman	1	-7/+12
2021-06-21	s390x/css: Introduce an ESW struct	Eric Farman	2	-7/+24
2021-06-21	linux-user/s390x: Save and restore psw.mask properly	Richard Henderson	1	-5/+32
2021-06-21	target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub	Richard Henderson	1	-13/+2
2021-06-21	target/s390x: Improve s390_cpu_dump_state vs cc_op	Richard Henderson	1	-5/+7
2021-06-21	target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask	Richard Henderson	1	-4/+4
2021-06-21	target/s390x: Expose load_psw and get_psw_mask to cpu.h	Richard Henderson	6	-61/+69
2021-06-21	configure: Check whether we can compile the s390-ccw bios with -msoft-float	Thomas Huth	1	-1/+1
2021-06-21	s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2	David Hildenbrand	3	-8/+14
2021-06-21	s390x/tcg: We support Vector enhancements facility	David Hildenbrand	1	-0/+1
2021-06-21	linux-user: elf: s390x: Prepare for Vector enhancements facility	David Hildenbrand	2	-0/+8
2021-06-21	s390x/tcg: Implement VECTOR FP (MAXIMUM\|MINIMUM)	David Hildenbrand	5	-0/+391
2021-06-21	s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD\|SUBTRACT)	David Hildenbrand	4	-2/+49
2021-06-21	s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD\|SUBTRACT)	David Hildenbrand	3	-8/+87
2021-06-21	s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE	David Hildenbrand	3	-2/+70
2021-06-21	s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION	David Hildenbrand	1	-33/+73
2021-06-21	s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED	David Hildenbrand	3	-1/+30
2021-06-21	s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED	David Hildenbrand	3	-3/+30
2021-06-21	s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR	David Hildenbrand	3	-9/+77
2021-06-21	s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *	David Hildenbrand	3	-12/+121
2021-06-21	s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER\|FP SQUARE ROOT)	David Hildenbrand	3	-15/+109
2021-06-21	s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD\|DIVIDE\|MULTIPLY\|SUBTRACT)	David Hildenbrand	3	-14/+153
2021-06-21	s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL	David Hildenbrand	2	-0/+52
2021-06-21	s390x/tcg: Implement VECTOR BIT PERMUTE	David Hildenbrand	4	-0/+33