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authorPeter Maydell <peter.maydell@linaro.org>2021-06-18 15:10:13 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-06-21 16:49:37 +0100
commit41b3ffc59966c78383e177e1dd38f884e886d960 (patch)
tree825d5aec1b927544f0f222b127d00e7cd96c7113
parent741292face087213b846faed7055ff51b7fee2dd (diff)
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target/arm/translate-vfp.c: Whitespace fixes
In the code for handling VFP system register accesses there is some stray whitespace after a unary '-' operator, and also some incorrect indent in a couple of function prototypes. We're about to move this code to another file, so fix the code style issues first so checkpatch doesn't complain about the code-movement patch. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210618141019.10671-2-peter.maydell@linaro.org
-rw-r--r--target/arm/translate-vfp.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/target/arm/translate-vfp.c b/target/arm/translate-vfp.c
index 01e26a2..5a4a13e 100644
--- a/target/arm/translate-vfp.c
+++ b/target/arm/translate-vfp.c
@@ -771,9 +771,8 @@ static void gen_branch_fpInactive(DisasContext *s, TCGCond cond,
}
static bool gen_M_fp_sysreg_write(DisasContext *s, int regno,
-
fp_sysreg_loadfn *loadfn,
- void *opaque)
+ void *opaque)
{
/* Do a write to an M-profile floating point system register */
TCGv_i32 tmp;
@@ -874,8 +873,8 @@ static bool gen_M_fp_sysreg_write(DisasContext *s, int regno,
}
static bool gen_M_fp_sysreg_read(DisasContext *s, int regno,
- fp_sysreg_storefn *storefn,
- void *opaque)
+ fp_sysreg_storefn *storefn,
+ void *opaque)
{
/* Do a read from an M-profile floating point system register */
TCGv_i32 tmp;
@@ -1207,7 +1206,7 @@ static void fp_sysreg_to_memory(DisasContext *s, void *opaque, TCGv_i32 value)
TCGv_i32 addr;
if (!a->a) {
- offset = - offset;
+ offset = -offset;
}
addr = load_reg(s, a->rn);
@@ -1242,7 +1241,7 @@ static TCGv_i32 memory_to_fp_sysreg(DisasContext *s, void *opaque)
TCGv_i32 value = tcg_temp_new_i32();
if (!a->a) {
- offset = - offset;
+ offset = -offset;
}
addr = load_reg(s, a->rn);