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2022-03-14ui/console: move console compatibility check to dcl_display_console()Marc-André Lureau1-10/+9
The current checks are done at registration time only. However, if a DCL has no specific console specified, it may be switched dynamically with console_select() later on. Let's move the checks when displaychangelistener_display_console() is called, which includes registration time and remains fatal if the specified console is incompatible. Note: we may want to display the compatibility error to the DCL, this is left for a future improvement. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-14ui/dbus: associate the DBusDisplayConsole listener with the given consoleMarc-André Lureau3-15/+17
DBusDisplayConsole is specific to a given QemuConsole. Fixes: commit 142ca628 ("ui: add a D-Bus display backend") Reported-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-14ui/console: egl-headless is compatible with non-gl listenersMarc-André Lureau1-0/+8
Fix a regression introduced by commit 5e79d516e ("ui: split the GL context in a different object"). Reported-by: Akihiko Odaki <akihiko.odaki@gmail.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-14ui/console: move dcl compatiblity check to a callbackMarc-André Lureau7-14/+52
As expected from the "compatible_dcl" comment, a simple comparison of ops isn't enough. The following patch will fix a regression introduced by this limited check by extending the compatibility callback for egl-headless. For now, this patch simply replaces the the "compatible_dcl" ops pointer with a "dpy_gl_ctx_is_compatible_ctx" callback. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-14ui/console: move check for compatible GL contextMarc-André Lureau1-15/+6
Move GL context compatibility check in dpy_compatible_with(), and use recommended error reporting. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2022-03-10Merge remote-tracking branch ↵Peter Maydell15-170/+474
'remotes/mcayland/tags/q800-updates-for-7.0-20220309' into staging q800-updates-for-7.0 queue # gpg: Signature made Wed 09 Mar 2022 10:57:07 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/q800-updates-for-7.0-20220309: (22 commits) esp: recreate ESPState current_req after migration esp: include the current PDMA callback in the migration stream esp: convert ESPState pdma_cb from a function pointer to an integer esp: introduce esp_pdma_cb() function esp: introduce esp_set_pdma_cb() function macfb: set initial value of mode control registers in macfb_common_realize() macfb: add VMStateDescription fields for display type and VBL timer macfb: increase number of registers saved in MacfbState macfb: don't use special irq_state and irq_mask variables in MacfbState macfb: add VMStateDescription for MacfbNubusState and MacfbSysBusState macio/pmu.c: remove redundant code mos6522: implement edge-triggering for CA1/2 and CB1/2 control line IRQs mac_via: make SCSI_DATA (DRQ) bit live rather than latched mos6522: record last_irq_levels in mos6522_set_irq() mos6522: add "info via" HMP command for debugging mos6522: add register names to register read/write trace events mos6522: use device_class_set_parent_reset() to propagate reset to parent mos6522: remove update_irq() and set_sr_int() methods from MOS6522DeviceClass mos6522: switch over to use qdev gpios for IRQs mac_via: use IFR bit flag constants for VIA2 IRQs ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09Merge remote-tracking branch 'remotes/philmd/tags/pmbus-20220308' into stagingPeter Maydell10-14/+948
I²C / SMBus / PMBus patches - Add some Renesas models - Add Titus Rwantare to MAINTAINERS # gpg: Signature made Tue 08 Mar 2022 18:11:46 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/pmbus-20220308: hw/sensor: add Renesas raa228000 device hw/sensor: add Renesas raa229004 PMBus device hw/sensor: add Intersil ISL69260 device model hw/i2c: Added linear mode translation for pmbus devices hw/i2c: pmbus: update MAINTAINERS hw/i2c: pmbus: refactor uint handling hw/i2c: pmbus: add PEC unsupported warning hw/i2c: pmbus: fix error returns and guard against out of range accesses hw/i2c: pmbus: add registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09Merge remote-tracking branch ↵Peter Maydell3-7/+6
'remotes/lvivier-gitlab/tags/linux-user-for-7.0-pull-request' into staging linux-user pull request 20220308 deliver SIGTRAP on POWERPC_EXCP_TRAP remove stale "not threadsafe" comments # gpg: Signature made Tue 08 Mar 2022 15:02:14 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/lvivier-gitlab/tags/linux-user-for-7.0-pull-request: tests/tcg/ppc64le: change signal_save_restore_xer to use SIGTRAP linux-user/ppc: deliver SIGTRAP on POWERPC_EXCP_TRAP linux-user: Remove stale "not threadsafe" comments Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20220308' ↵Peter Maydell7-49/+114
into staging aspeed queue: * Fix for a potential memory leak * Aspeed SMC cleanups on the definition of the number of flash devices * New bletchley-bmc machine, AST2600 based # gpg: Signature made Tue 08 Mar 2022 08:19:25 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-aspeed-20220308: hw: aspeed_gpio: Cleanup stray semicolon after switch hw/arm/aspeed: add Bletchley machine type hw/arm/aspeed: allow missing spi_model hw/block: m25p80: Add support for w25q01jvq aspeed/smc: Fix error log aspeed/smc: Let the SSI core layer define the bus name aspeed/smc: Rename 'max_peripherals' to 'cs_num_max' aspeed/smc: Remove 'num_cs' field aspeed: Rework aspeed_board_init_flashes() interface aspeed/smc: Use max number of CE instead of 'num_cs' aspeed: Fix a potential memory leak bug in write_boot_rom() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-20220308' ↵Peter Maydell4-0/+0
into staging qemu-openbios queue # gpg: Signature made Tue 08 Mar 2022 08:05:09 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-openbios-20220308: roms/openbios: update OpenBIOS images to 0e0afae6 built from submodule Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2022-03-07' into ↵Peter Maydell17-69/+268
staging nbd patches for 2022-03-07 - Dan Berrange: Allow qemu-nbd to support TLS over Unix sockets - Eric Blake: Minor cleanups related to 64-bit block operations # gpg: Signature made Tue 08 Mar 2022 01:41:35 GMT # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2022-03-07: qemu-io: Allow larger write zeroes under no fallback qemu-io: Utilize 64-bit status during map nbd/server: Minor cleanups tests/qemu-iotests: validate NBD TLS with UNIX sockets and PSK tests/qemu-iotests: validate NBD TLS with UNIX sockets tests/qemu-iotests: validate NBD TLS with hostname mismatch tests/qemu-iotests: convert NBD TLS test to use standard filters tests/qemu-iotests: introduce filter for qemu-nbd export list tests/qemu-iotests: expand _filter_nbd rules tests/qemu-iotests: add QEMU_IOTESTS_REGEN=1 to update reference file block/nbd: don't restrict TLS usage to IP sockets qemu-nbd: add --tls-hostname option for TLS certificate validation block/nbd: support override of hostname for TLS certificate validation block: pass desired TLS hostname through from block driver client crypto: mandate a hostname when checking x509 creds on a client Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-09esp: recreate ESPState current_req after migrationMark Cave-Ayland1-0/+10
Since PDMA reads/writes are driven by the guest, it is possible that migration can occur whilst a SCSIRequest is still active. Fortunately active SCSIRequests are already included in the migration stream and restarted post migration but this still leaves the reference in ESPState uninitialised. Implement the SCSIBusInfo .load_request callback to obtain a reference to the currently active SCSIRequest and use it to recreate ESPState current_req after migration. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09esp: include the current PDMA callback in the migration streamMark Cave-Ayland1-0/+31
This involves (re)adding a PDMA-specific subsection to hold the reference to the current PDMA callback. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09esp: convert ESPState pdma_cb from a function pointer to an integerMark Cave-Ayland2-14/+41
This prepares for the inclusion of the current PDMA callback in the migration stream since the callback is referenced by an integer instead of a function pointer. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-9-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09esp: introduce esp_pdma_cb() functionMark Cave-Ayland1-2/+7
This function is to be used to execute the current PDMA callback rather than dereferencing the ESPState pdma_cb function pointer directly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09esp: introduce esp_set_pdma_cb() functionMark Cave-Ayland1-7/+12
This function is to be used to set the current PDMA callback rather than accessing the ESPState pdma_cb function pointer directly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09macfb: set initial value of mode control registers in macfb_common_realize()Mark Cave-Ayland1-0/+8
If booting Linux directly in the q800 machine using -kernel rather than using a MacOS toolbox ROM, the mode control registers are never initialised, causing macfb_mode_write() to fail to determine the current resolution after migration. Resolve this by always setting the initial values of the mode control registers based upon the initial macfb properties during realize. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09macfb: add VMStateDescription fields for display type and VBL timerMark Cave-Ayland1-0/+2
These fields are required in the migration stream to restore macfb state correctly. Note this is a migration break, but since there are upcoming incompatible changes for the q800 machine (and migration does not even succeed without these patches) then this is not an issue. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09macfb: increase number of registers saved in MacfbStateMark Cave-Ayland2-1/+10
The MacOS toolbox ROM accesses a number of addresses between 0x0 and 0x200 during initialisation and resolution changes. Whilst the function of many of these registers is unknown, it is worth the minimal cost of saving these extra values as part of migration to help future-proof the migration stream for the q800 machine as it starts to stabilise. Note this is a migration break, but since there are upcoming incompatible changes for the q800 machine (and migration does not even succeed without these patches) then this is not an issue. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09macfb: don't use special irq_state and irq_mask variables in MacfbStateMark Cave-Ayland2-10/+7
The current IRQ state and IRQ mask are handled exactly the same as standard register accesses, so store these values directly in the regs array rather than having separate variables for them. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09macfb: add VMStateDescription for MacfbNubusState and MacfbSysBusStateMark Cave-Ayland1-2/+22
Currently when QEMU tries to migrate the macfb framebuffer it crashes randomly because the opaque provided by the DeviceClass vmsd property for both devices is set to MacfbState rather than MacfbNubusState or MacfbSysBusState as appropriate. Resolve the issue by adding new VMStateDescriptions for MacfbNubusState and MacfbSysBusState which embed the existing vmstate_macfb VMStateDescription within them using VMSTATE_STRUCT. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305155530.9265-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09macio/pmu.c: remove redundant codeMark Cave-Ayland2-35/+0
Now that the logic related to edge-triggered interrupts is all contained within the mos6522 device the redundant implementation for the mac99 PMU device can be removed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-13-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: implement edge-triggering for CA1/2 and CB1/2 control line IRQsMark Cave-Ayland4-12/+109
The mos6522 datasheet describes how the control lines IRQs are edge-triggered according to the configuration in the PCR register. Implement the logic according to the datasheet so that the interrupt bits in IFR are latched when the edge is detected, and cleared when reading portA/portB or writing to IFR as necessary. To maintain bisectibility this change also updates the SCSI, SCSI data, Nubus and VIA2 60Hz/1Hz clocks in the q800 machine to be negative edge-triggered as confirmed by the PCR programming in all of Linux, NetBSD and MacOS. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mac_via: make SCSI_DATA (DRQ) bit live rather than latchedMark Cave-Ayland1-1/+16
The VIA2 on the Q800 machine is not a separate chip as in older Macs but instead is integrated into the on-board logic. From analysing the SCSI routines in the MacOS toolbox ROM (and to a lesser extent NetBSD and Linux) the expectation seems to be that the SCSI_DATA (DRQ) bit is live on the Q800 and not latched. Fortunately we can use the recently introduced mos6522 last_irq_levels variable which tracks the edge-triggered state to return the SCSI_DATA (DRQ) bit live to the guest OS. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220305150957.5053-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: record last_irq_levels in mos6522_set_irq()Mark Cave-Ayland2-2/+10
To detect edge-triggered IRQs it is necessary to store the last state of each IRQ in a last_irq_levels bitmap. Note: this is a migration break for machines which use mos6522 instances which are g3beige/mac99 (PPC) and q800 (m68k). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: add "info via" HMP command for debuggingMark Cave-Ayland4-0/+121
This displays detailed information about the device registers and timers to aid debugging problems with timers and interrupts. Currently the QAPI generators for HumanReadableText don't work correctly if used in qapi/target-misc.json when a non-specified target is built, so for now manually add a hmp_info_via() wrapper until direct support for per-device HMP/QMP commands is implemented. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-9-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: add register names to register read/write trace eventsMark Cave-Ayland3-5/+14
This helps to follow how the guest is programming the mos6522 when debugging. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220305150957.5053-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: use device_class_set_parent_reset() to propagate reset to parentMark Cave-Ayland4-5/+9
Switch from using a legacy approach to the more formal approach for propagating device reset to the parent. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: remove update_irq() and set_sr_int() methods from MOS6522DeviceClassMark Cave-Ayland2-11/+0
Now that the mos6522 IRQs are managed using standard qdev gpios these methods are no longer required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: switch over to use qdev gpios for IRQsMark Cave-Ayland6-56/+31
For historical reasons each mos6522 instance implements its own setting and update of the IFR flag bits using methods exposed by MOS6522DeviceClass. As of today this is no longer required, and it is now possible to implement the mos6522 IRQs as standard qdev gpios. Switch over to use qdev gpios for the mos6522 device and update all instances accordingly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mac_via: use IFR bit flag constants for VIA2 IRQsMark Cave-Ayland1-10/+9
This allows us to easily see how the physical control lines are mapped to the IFR bit flags. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220305150957.5053-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mac_via: use IFR bit flag constants for VIA1 IRQsMark Cave-Ayland1-10/+10
This allows us to easily see how the physical control lines are mapped to the IFR bit flags. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220305150957.5053-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09mos6522: add defines for IFR bit flagsMark Cave-Ayland1-7/+15
These are intended to make it easier to see how the physical control lines are wired for each instance. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220305150957.5053-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2022-03-09Merge remote-tracking branch 'remotes/philmd/tags/mips-20220308' into stagingPeter Maydell27-190/+127
MIPS patches queue - Fix CP0 cycle counter timing - Fix VMState of gt64120 IRQs - Long due PIIX4 QOM cleanups - ISA IRQ QOM'ification / cleanups # gpg: Signature made Tue 08 Mar 2022 18:39:42 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/mips-20220308: tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tag hw/isa: Inline and remove one-line isa_init_irq() hw/isa: Drop unused attributes from ISADevice hw/isa/isa-bus: Remove isabus_dev_print() hw/input/pckbd: QOM'ify IRQ numbers hw/rtc/m48t59-isa: QOM'ify IRQ number hw/rtc/mc146818rtc: QOM'ify IRQ number hw/mips/gt64xxx_pci: Resolve gt64120_register() hw/isa/piix4: Replace some magic IRQ constants hw/isa/piix4: Resolve global instance variable hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq() hw/isa/piix4: Resolve redundant i8259[] attribute malta: Move PCI interrupt handling from gt64xxx_pci to piix4 hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration target/mips: Remove duplicated MIPSCPU::cp0_count_rate target/mips: Fix cycle counter timing calculations Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-08Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell66-174/+1229
virtio,pc,pci: features, cleanups, fixes vhost-user enabled on non-linux systems beginning of nvme sriov support bigger tx queue for vdpa virtio iommu bypass FADT flag to detect legacy keyboards Fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 07 Mar 2022 22:43:31 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (47 commits) hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present tests/acpi: i386: update FACP table differences hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table tests/acpi: i386: allow FACP acpi table changes docs: vhost-user: add subsection for non-Linux platforms configure, meson: allow enabling vhost-user on all POSIX systems vhost: use wfd on functions setting vring call fd event_notifier: add event_notifier_get_wfd() pci: drop COMPAT_PROP_PCP for 2.0 machine types hw/smbios: Add table 4 parameter, "processor-id" x86: cleanup unused compat_apic_id_mode vhost-vsock: detach the virqueue element in case of error pc: add option to disable PS/2 mouse/keyboard acpi: pcihp: pcie: set power on cap on parent slot pci: expose TYPE_XIO3130_DOWNSTREAM name pci: show id info when pci BDF conflict hw/misc/pvpanic: Use standard headers instead headers: Add pvpanic.h pci-bridge/xio3130_downstream: Fix error handling pci-bridge/xio3130_upstream: Fix error handling ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # docs/specs/index.rst
2022-03-08Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/python-pull-request' ↵Peter Maydell4-167/+268
into staging Python patches Hopefully, fixes the race conditions witnessed through the NetBSD vm tests. # gpg: Signature made Mon 07 Mar 2022 22:14:42 GMT # gpg: using RSA key F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full] # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jsnow-gitlab/tags/python-pull-request: scripts/qmp-shell-wrap: Fix import path python/aqmp: drop _bind_hack() python/aqmp: fix race condition in legacy.py python/aqmp: add start_server() and accept() methods python/aqmp: stop the server during disconnect() python/aqmp: refactor _do_accept() into two distinct steps python/aqmp: squelch pylint warning for too many lines python/aqmp: split _client_connected_cb() out as _incoming() python/aqmp: remove _new_session and _establish_connection python/aqmp: rename 'accept()' to 'start_server_and_accept()' python/aqmp: add _session_guard() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-08tests/avocado/linux_ssh_mips_malta.py: add missing accel (tcg) tagCleber Rosa1-0/+3
Being explicit about the accelerator used on these tests is a good thing in itself, but it will also be used in the filtering rules applied on "make check-avocado". Signed-off-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220225210156.2032055-6-crosa@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/isa: Inline and remove one-line isa_init_irq()Bernhard Beschow16-23/+16
isa_init_irq() has become a trivial one-line wrapper for isa_get_irq(). It can therefore be removed. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> (tpm_tis_isa) Acked-by: Corey Minyard <cminyard@mvista.com> (isa_ipmi_bt, isa_ipmi_kcs) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20220301220037.76555-8-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220307134353.1950-14-philippe.mathieu.daude@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2022-03-08hw/isa: Drop unused attributes from ISADeviceBernhard Beschow2-15/+0
Now that the last users of ISADevice::isairq[] have been resolved during the previous commits, it can be removed for good. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220301220037.76555-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220307134353.1950-13-philippe.mathieu.daude@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2022-03-08hw/isa/isa-bus: Remove isabus_dev_print()Bernhard Beschow2-42/+0
All isabus_dev_print() did was to print up to two IRQ numbers per device. This is redundant if the IRQ numbers are present as QOM properties (see e.g. the modified tests/qemu-iotests/172.out). Now that the last devices relying on isabus_dev_print() had their IRQ numbers QOM'ified, the contribution of this function ultimately became redundant. Remove it. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220301220037.76555-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220307134353.1950-12-philippe.mathieu.daude@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2022-03-08hw/input/pckbd: QOM'ify IRQ numbersBernhard Beschow1-4/+22
Exposing the IRQ numbers as QOM properties not only allows them to be configurable but also to be printed by standard QOM mechanisms. This allows isabus_dev_print() to be retired eventually. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220301220037.76555-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220307134353.1950-11-philippe.mathieu.daude@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2022-03-08hw/rtc/m48t59-isa: QOM'ify IRQ numberBernhard Beschow1-1/+8
Exposing the IRQ number as a QOM property not only allows it to be configurable but also to be printed by standard QOM mechanisms. This allows isabus_dev_print() to be retired eventually. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220301220037.76555-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220307134353.1950-10-philippe.mathieu.daude@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2022-03-08hw/rtc/mc146818rtc: QOM'ify IRQ numberBernhard Beschow3-3/+13
Exposing the IRQ number as a QOM property not only allows it to be configurable but also to be displayed in HMP: Before: (qemu) info qtree ... dev: mc146818rtc, id "" gpio-out "" 1 base_year = 0 (0x0) lost_tick_policy = "discard" After: dev: mc146818rtc, id "" gpio-out "" 1 base_year = 0 (0x0) irq = 8 (0x8) lost_tick_policy = "discard" The reason the IRQ number didn's show up before is that this device does not call isa_init_irq(). Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220301220037.76555-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220307134353.1950-9-philippe.mathieu.daude@gmail.com> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
2022-03-08hw/mips/gt64xxx_pci: Resolve gt64120_register()Bernhard Beschow3-21/+6
Now that gt64120_register() lost its pic parameter, there is an opportunity to remove it. gt64120_register() is old style by wrapping qdev API, and the new style is to use qdev directly. So take the opportunity and modernize the code. Suggested-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20220217101924.15347-8-shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/isa/piix4: Replace some magic IRQ constantsBernhard Beschow1-3/+3
This is a follow-up on patch "malta: Move PCI interrupt handling from gt64xxx_pci to piix4". gt64xxx_pci used magic constants, and probably didn't want to use piix4-specific constants. Now that the interrupt handing resides in piix4, its constants can be used. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220217101924.15347-7-shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/isa/piix4: Resolve global instance variableBernhard Beschow2-9/+3
Now that piix4_set_irq's opaque parameter references own PIIX4State, piix4_dev becomes redundant. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220217101924.15347-6-shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq()Bernhard Beschow1-3/+3
Passing PIIX4State rather than just the qemu_irq allows for resolving the global piix4_dev variable. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220217101924.15347-5-shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/isa/piix4: Resolve redundant i8259[] attributeBernhard Beschow1-6/+1
This is a follow-up on patch "malta: Move PCI interrupt handling from gt64xxx_pci to piix4" where i8259[] was moved from MaltaState to PIIX4State to make the code movement more obvious. However, i8259[] seems redundant to *isa, so remove it. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220217101924.15347-4-shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08malta: Move PCI interrupt handling from gt64xxx_pci to piix4Bernhard Beschow4-61/+62
Handling PCI interrupts in piix4 increases cohesion and reduces differences between piix4 and piix3. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220217101924.15347-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migrationBernhard Beschow1-5/+2
Based on commit e735b55a8c11dd455e31ccd4420e6c9485191d0c: piix_pci: eliminate PIIX3State::pci_irq_levels PIIX3State::pci_irq_levels are redundant which is already tracked by PCIBus layer. So eliminate them. The IRQ levels in the PCIBus layer are already preserved during migration. By reusing them and rather than having a redundant implementation the bug is avoided in the first place. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220217101924.15347-2-shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
generated by cgit v1.1 at 2024-12-29 09:42:49 +0000