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| author | Bernhard Beschow <shentey@gmail.com> | 2022-02-17 11:19:21 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-03-08 19:38:01 +0100 |
| commit | 19b82e3e44c8ed7a2e06eb2027f0a2808aa8142b (patch) | |
| tree | 006fd7770cb7d3574c2ac6aa29ded9e543dba7c0 | |
| parent | 933ab073be42a49f2e83ff18612ffc4940dfa55e (diff) | |
| download | qemu-19b82e3e44c8ed7a2e06eb2027f0a2808aa8142b.zip qemu-19b82e3e44c8ed7a2e06eb2027f0a2808aa8142b.tar.gz qemu-19b82e3e44c8ed7a2e06eb2027f0a2808aa8142b.tar.bz2 | |
hw/isa/piix4: Pass PIIX4State as opaque parameter for piix4_set_irq()
Passing PIIX4State rather than just the qemu_irq allows for resolving
the global piix4_dev variable.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20220217101924.15347-5-shentey@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
| -rw-r--r-- | hw/isa/piix4.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 179968b..caa2002 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -57,7 +57,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE) static void piix4_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; - qemu_irq *pic = opaque; + PIIX4State *s = opaque; PCIBus *bus = pci_get_bus(piix4_dev); /* now we change the pic irq level according to the piix irq mappings */ @@ -71,7 +71,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level) pic_level |= pci_bus_get_irq_level(bus, i); } } - qemu_set_irq(pic[pic_irq], pic_level); + qemu_set_irq(s->isa[pic_irq], pic_level); } } @@ -319,7 +319,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) NULL, 0, NULL); } - pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->isa, 4); + pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, 4); return dev; } |