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2022-09-22chardev/baum: Use definitions to avoid dynamic stack allocationPhilippe Mathieu-Daudé1-4/+4
We know 'x * y' will be at most 'X_MAX * Y_MAX' (which is not a big value, it is actually 84). Instead of having the compiler use variable-length array, declare an array able to hold the maximum 'x * y'. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220819153931.3147384-3-peter.maydell@linaro.org
2022-09-22chardev/baum: Replace magic values by X_MAX / Y_MAX definitionsPhilippe Mathieu-Daudé1-4/+7
Replace '84' magic value by the X_MAX definition, and '1' by Y_MAX. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220819153931.3147384-2-peter.maydell@linaro.org
2022-09-22hw/net/lan9118: Signal TSFL_INT flag when TX FIFO reaches specified levelLucas Dietrich1-0/+8
The LAN9118 allows the guest to specify a level for both the TX and RX FIFOs at which an interrupt will be generated. We implement the RSFL_INT interrupt for the RX FIFO but are missing the handling of the equivalent TSFL_INT for the TX FIFO. Add the missing test to set the interrupt if the TX FIFO has exceeded the guest-specified level. This flag is required for Micrium lan911x ethernet driver to work. Signed-off-by: Lucas Dietrich <ld.adecy@gmail.com> [PMM: Tweaked commit message and comment] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22hw/acpi: Add ospm_status hook implementation for acpi-gedKeqian Zhu1-0/+8
Setup an ARM virtual machine of machine virt and execute qmp "query-acpi-ospm-status" causes segmentation fault with following dumpstack: #1 0x0000aaaaab64235c in qmp_query_acpi_ospm_status (errp=errp@entry=0xfffffffff030) at ../monitor/qmp-cmds.c:312 #2 0x0000aaaaabfc4e20 in qmp_marshal_query_acpi_ospm_status (args=<optimized out>, ret=0xffffea4ffe90, errp=0xffffea4ffe88) at qapi/qapi-commands-acpi.c:63 #3 0x0000aaaaabff8ba0 in do_qmp_dispatch_bh (opaque=0xffffea4ffe98) at ../qapi/qmp-dispatch.c:128 #4 0x0000aaaaac02e594 in aio_bh_call (bh=0xffffe0004d80) at ../util/async.c:150 #5 aio_bh_poll (ctx=ctx@entry=0xaaaaad0f6040) at ../util/async.c:178 #6 0x0000aaaaac00bd40 in aio_dispatch (ctx=ctx@entry=0xaaaaad0f6040) at ../util/aio-posix.c:421 #7 0x0000aaaaac02e010 in aio_ctx_dispatch (source=0xaaaaad0f6040, callback=<optimized out>, user_data=<optimized out>) at ../util/async.c:320 #8 0x0000fffff76f6884 in g_main_context_dispatch () at /usr/lib64/libglib-2.0.so.0 #9 0x0000aaaaac0452d4 in glib_pollfds_poll () at ../util/main-loop.c:297 #10 os_host_main_loop_wait (timeout=0) at ../util/main-loop.c:320 #11 main_loop_wait (nonblocking=nonblocking@entry=0) at ../util/main-loop.c:596 #12 0x0000aaaaab5c9e50 in qemu_main_loop () at ../softmmu/runstate.c:734 #13 0x0000aaaaab185370 in qemu_main (argc=argc@entry=47, argv=argv@entry=0xfffffffff518, envp=envp@entry=0x0) at ../softmmu/main.c:38 #14 0x0000aaaaab16f99c in main (argc=47, argv=0xfffffffff518) at ../softmmu/main.c:47 Fixes: ebb62075021a ("hw/acpi: Add ACPI Generic Event Device Support") Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20220816094957.31700-1-zhukeqian1@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add is_secure parameter to get_phys_addr_pmsav5Richard Henderson1-2/+2
Remove the use of regime_is_secure from get_phys_addr_pmsav5. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-21-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add secure parameter to get_phys_addr_pmsav7Richard Henderson1-3/+2
Remove the use of regime_is_secure from get_phys_addr_pmsav7, using the new parameter instead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-19-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add is_secure parameter to pmsav7_use_background_regionRichard Henderson1-5/+5
Remove the use of regime_is_secure from pmsav7_use_background_region, using the new parameter instead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-17-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add secure parameter to get_phys_addr_pmsav8Richard Henderson1-3/+2
Remove the use of regime_is_secure from get_phys_addr_pmsav8. Since we already had a local variable named secure, use that. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-16-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add is_secure parameter to get_phys_addr_v6Richard Henderson1-6/+5
Remove the use of regime_is_secure from get_phys_addr_v6, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-15-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add is_secure parameter to get_phys_addr_v5Richard Henderson1-7/+7
Remove the use of regime_is_secure from get_phys_addr_v5, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMM: Folded in definition of local is_secure in get_phys_addr(), since I dropped the earlier patch that would have provided it] Message-id: 20220822152741.1617527-14-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add secure parameter to pmsav8_mpu_lookupRichard Henderson3-7/+6
Remove the use of regime_is_secure from pmsav8_mpu_lookup, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-13-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Add is_secure parameter to v8m_security_lookupRichard Henderson3-8/+12
Remove the use of regime_is_secure from v8m_security_lookup, passing the new parameter to the lookup instead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-12-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Remove is_subpage argument to pmsav8_mpu_lookupRichard Henderson3-15/+15
This can be made redundant with result->page_size, by moving the basic set of page_size from get_phys_addr_pmsav8. We still need to overwrite page_size when v8m_security_lookup signals a subpage. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-11-richard.henderson@linaro.org [PMM: Update a comment that used to refer to is_subpage] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Use GetPhysAddrResult in pmsav8_mpu_lookupRichard Henderson3-26/+21
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-10-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8Richard Henderson1-14/+14
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-9-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav7Richard Henderson1-19/+17
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav5Richard Henderson1-12/+12
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-7-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Use GetPhysAddrResult in get_phys_addr_v5Richard Henderson1-14/+11
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Use GetPhysAddrResult in get_phys_addr_v6Richard Henderson1-16/+14
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Use GetPhysAddrResult in get_phys_addr_lpaeRichard Henderson1-43/+26
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Create GetPhysAddrResultRichard Henderson5-125/+109
Combine 5 output pointer arguments from get_phys_addr into a single struct. Adjust all callers. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220822152741.1617527-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22target/arm: Fix alignment for VLD4.32Clément Chigot1-1/+5
When requested, the alignment for VLD4.32 is 8 and not 16. See ARM documentation about VLD4 encoding: ebytes = 1 << UInt(size); if size == '10' then alignment = if a == '0' then 1 else 8; else alignment = if a == '0' then 1 else 4*ebytes; Signed-off-by: Clément Chigot <chigot@adacore.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220914105058.2787404-1-chigot@adacore.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-22hw/net/can: fix Xilinx ZynqMP CAN RX FIFO logicAnton Kochkov1-16/+16
For consistency, function "update_rx_fifo()" should use the RX FIFO register field names, not the TX FIFO ones, even if they refer to the same bit positions in the register. Signed-off-by: Anton Kochkov <anton.kochkov@proton.me> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: 20220817141754.2105981-1-anton.kochkov@proton.me Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1123 [PMM: tweaked commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-09-21Merge tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k ↵Stefan Hajnoczi5-89/+118
into staging m68k pull request 20220921 - several fixes for SR - implement TAS - feature cleanup # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmMrMx0SHGxhdXJlbnRA # dml2aWVyLmV1AAoJEPMMOL0/L748UB0P/1w5w+ogpcWVp9uBPE9m6lTT8sTricWD # oGMIEG0kgpS3xTp7pZ/WeCp38IShFBfBcz5aypvR5nS/1aclyJnzGsCqyWdBe9c4 # jJJY5r7JKP2aKcolGNilNyd20ldOiaxZGe6yFLJDWi2spFbRx3iiRJ4/2NXF5Xi8 # TlHKdlDGlNLFiFNtBXMMwqvL77qJ8LH/aE4cAr8JTOb1VszKXrFxqEqxoUucRirB # u0LbM+DP3u2xXjTGLMLlMcKf9X2BXwuWBSAXslB8xWmRlX+B6fMudBFglTgbu0Cc # bpoBBqY4s3QYPb21i89osYevJAJSdrtEzkKus3xAI08ACSffb9k9m/naVJJDSSNC # HZeKVbAd7I0Xw2xzzO5yQB+7rdfgoL1miE1rs936WKHi0WWHZpdJqzl/3G3ZPhRz # NmqczF9rRR9B9SabXx5lWlhK+Ys/W7PzY+R4gc6ose0wF4T70qmVF3EoioP1c5Y8 # 6OonMpRu6L5sW5KM3IUmkBo3KcnLezlxtebfaDyaKC9tB0qg4aM14ikL36nsLFbh # 2nGExYSyMJ6U4tqpxyQxijMMSQG20vyVIup6cUsrSD+rGmbSuWZWJwsTmaAw2W6k # 6HtDgtFk40ZB1WttYupQBa/LgjshGLl28jyLI9nNEdFYb4H1JAallEERF/tb6AUD # WEiu8vcUMYEp # =IAMt # -----END PGP SIGNATURE----- # gpg: Signature made Wed 21 Sep 2022 11:51:57 EDT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k: target/m68k: always call gen_exit_tb() after writes to SR target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K target/m68k: Perform writback before modifying SR target/m68k: Fix MACSR to CCR target/m68k: Implement atomic test-and-set Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-21Merge tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu into stagingStefan Hajnoczi16-84/+278
ppc patch queue for 2022-09-20: This queue contains a implementation of PowerISA 3.1B hash insns, ppc TCG insns cleanups and fixes, and miscellaneus fixes in the spapr and pnv_phb models. # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYyoWlAAKCRA82cqW3gMx # ZDYhAP0eQMeA4NS3hiw7WMcAVg0pei3ZJL9oEh1UE3+MfK7MhQEA0q8qExWnQJAA # a0hfnFH9pLjI+v0f/FbFK6QJBpu/bg8= # =qT+H # -----END PGP SIGNATURE----- # gpg: Signature made Tue 20 Sep 2022 15:37:56 EDT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu: hw/ppc/spapr: Fix code style problems reported by checkpatch hw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failure hw/ppc: spapr: Use qemu_vfree() to free spapr->htab target/ppc: Clear fpstatus flags on helpers missing it target/ppc: Zero second doubleword of VSR registers for FPR insns target/ppc: Set OV32 when OV is set target/ppc: Zero second doubleword for VSX madd instructions target/ppc: Set result to QNaN for DENBCD when VXCVI occurs target/ppc: Zero second doubleword in DFP instructions target/ppc: Remove unused xer_* macros target/ppc: Remove extra space from s128 field in ppc_vsr_t target/ppc: Merge fsqrt and fsqrts helpers target/ppc: Move fsqrts to decodetree target/ppc: Move fsqrt to decodetree target/ppc: Implement hashstp and hashchkp target/ppc: Implement hashst and hashchk target/ppc: Add HASHKEYR and HASHPKEYR SPRs Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-21Merge tag 'pull-testing-next-200922-2' of https://github.com/stsquad/qemu ↵Stefan Hajnoczi43-475/+361
into staging Testing and CI changes: - reduce number of targets for cross_user_build - update avocado xlnx_versal test with new binaries - add explicit timeouts to a number of avocado TCG tests - reduce default timeout to 120s - update lcitool to support cross-amd64 - flatten a number of docker cross containers - clean up stale qemu/debian10 dependencies - remove obsolete Fedora VM test - add configure workaround for meson --disable-pie bug - disable --static-pie for aarch64 gitlab runner - update aarch32/aarch64 jobs to 22.04 - deprecate 32 bit big-endian MIPS as a host - remove FROM qemu/ support from docker.py - remove Debian base images now everything is flat # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmMp8Q8ACgkQ+9DbCVqe # KkQmlwf/awT+jOmAW7TjlQnUTgHJ2hyOo7EViY/nmRkPOCT3ZG32pWFHBorHPX7s # BeqZzpzCvhzaIfObnjIssx13C5QId5XjJGuTgMAnSsGhzTrp7VUJc1/bBfHcD9L2 # dJJduG+bfAkh95heBkry5EhFt2ZMui5yv9DjEH44hUUc9nwKtIQGts3H3fnVqzvv # rzLZ7c2lhdLpAxHjmjSiiD8H59lJ+DpoziaobW4D7teGgecnyGVvJ9m1YH4Rc+kM # gpLTOGMhADkQlysf5e5cvxXSJbP7YpXYrsr9X+DfEy5PMt2L3y4Yv0wiAz9ClYvm # obD4wMQS5echYvb77qS1G8A0VMEPqA== # =3oYu # -----END PGP SIGNATURE----- # gpg: Signature made Tue 20 Sep 2022 12:57:51 EDT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-testing-next-200922-2' of https://github.com/stsquad/qemu: (30 commits) tests/docker: remove the Debian base images tests/docker: remove FROM qemu/ support from docker.py tests/docker: update and flatten debian-toolchain tests/docker: update and flatten debian-hexagon-cross tests/docker: update and flatten debian-loongarch-cross tests/docker: update and flatten debian-amd64-cross tests/lcitool: bump to latest version tests/docker: update and flatten debian-all-test-cross tests/docker: flatten debian-riscv64-test-cross Deprecate 32 bit big-endian MIPS gitlab-ci: update aarch32/aarch64 custom runner jobs gitlab-ci/custom-runners: Disable -static-pie for ubuntu-20.04-aarch64 configure: explicitly set cflags for --disable-pie tests/vm: Remove obsolete Fedora VM test tests/docker: remove amd64 qemu/debian10 dependency tests/docker: remove tricore qemu/debian10 dependency tests/docker: flatten debian-powerpc-test-cross tests/docker: update and flatten debian-sparc64-cross tests/docker: update and flatten debian-sh4-cross tests/docker: update and flatten debian-mips64-cross ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-21target/m68k: always call gen_exit_tb() after writes to SRMark Cave-Ayland1-0/+4
Any write to SR can change the security state so always call gen_exit_tb() when this occurs. In particular MacOS makes use of andiw/oriw in a few places to handle the switch between user and supervisor mode. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220917112515.83905-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-09-21target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68KMark Cave-Ayland5-74/+75
The M68K_FEATURE_M68000 feature is misleading in that its name suggests the feature is defined just for Motorola 68000 CPUs, whilst in fact it is defined for all Motorola 680X0 CPUs. In order to avoid confusion with the other M68K_FEATURE_M680X0 constants which define the features available for specific Motorola CPU models, rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K and add comments to clarify its usage. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220917112515.83905-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-09-21target/m68k: Perform writback before modifying SRRichard Henderson1-3/+5
Writes to SR may change security state, which may involve a swap of %ssp with %usp as reflected in %a7. Finish the writeback of %sp@+ before swapping stack pointers. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1206 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220913142818.7802-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-09-21target/m68k: Fix MACSR to CCRRichard Henderson1-2/+4
First, we were writing to the entire SR register, instead of only the flags portion. Second, we were not clearing C as per the documentation (X was cleared via the 0xf mask). Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220913142818.7802-2-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-09-21target/m68k: Implement atomic test-and-setRichard Henderson1-10/+30
This is slightly more complicated than cas, because tas is allowed on data registers. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220829051746.227094-1-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-09-20Merge tag 'pull-request-2022-09-20' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi21-143/+196
staging * Skip tests if the corresponding feature is missing * Update NetBSD VM test to version 9.3 * Update the FreeBSD CI to version 13.1 * Some small fixes for the qtests * Update wordings in the QEMU guest-agent # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmMpvqURHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXtaQ//ap4P8Gdg7HyShflpHj3+Z+UC/THtcCAD # F5Oj/E89wYJZJvWpjELLUf+218O+zbcKkv6z25AHo37JRSLQMzsD21RpDYcu8qnN # Xk77KrOLFaVRRo6e3FAi5I+uWsm1h/9jJfC/sFrzfKGnWcW5pTzXUkbvWT3LZo/q # d0wJCMn/+h0j6kqhjm8mhFCsGsSaUKFCMzm/6rsWxVsMsVnlTyYhg/IzhocKrkVD # 9ZWz+jAv+h4F0CLl/SeRvZFq4LEGZoP3KHWrDAgEO9i1yC+tNpGDFyV/hJXwapcm # jYGaPPgS2dLToMXf5uubfmyptircQKqdpC2Hl8UwgUS6OgwA2YRCxad8rrrdBezq # 2Nb8KissVB8ySL1Asf00gxioJNwLKrY+4NIeDVxAQ56f1/9kd0w0ylrweR492V/p # z3Yrs3uqqALR1jWfB7/Rh4EN2R0oe6bnlfb8bB6lzPKynXQicZLeoOnNPbkOQMw8 # HgjKVFT130ydXJKMJkgEQmi4JUGoaKqSKCmlSaHz9TAobwNiVBXaH0cyuX5QEuoX # WgZosiF5nBzdbhkC2IPcQYHzIIkelfx9j9mKE0PNfUSkFgMiywcI5TfqabPWGeaA # rxYPU4EZmbgCZPlBVdPFwog/BXap2EIo9+xtINM0COQDoy+Q/l5Z3keHhpjayBBS # qWc6CRSmhLs= # =sHK+ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 20 Sep 2022 09:22:45 EDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-09-20' of https://gitlab.com/thuth/qemu: qga: Replace 'blacklist' and 'whitelist' in the guest agent sources qga: Replace 'blacklist' command line and config file options by 'block-rpcs' gitlab-ci: Update the FreeBSD 13 job from 13.0 to 13.1 tests: sb16 has both pc and q35 tests tests: Only run intel-hda-tests if machine type is compiled in bios-tables-test: Only run test for machine types compiled in bios-tables-test: Sort all x86_64 tests by machine type bios-tables-test: Make oem-fields tests be consistent meson-build: Enable CONFIG_REPLICATION only when replication is set tests: Fix error strings qtest/fuzz-lsi53c895a-test: set guest RAM to 2G tests/qtest: npcm7xx-emc-test: Skip checking MAC .gitlab-ci.d/windows.yml: Drop the sed processing in the 64-bit build tests/vm: update NetBSD to 9.3 tests: mark io-command test as skipped if socat is missing Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-20Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi29-743/+869
* add help option for -audio and -audiodev * another missing memory barrier for dirty pages * target/i386: Raise #GP on unaligned m128 accesses * coverity fixes + improvements to components * add MMX and 3DNow! tests * SSE4a fixes * target/i386: TCG translation cleanups * update qboot submodule # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmMocZcUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroNV7Qf+NEoB8R0ug+ClMRe1Qqt8FXEd0eXE # nT19q4rOWfmW4/L+wI6gpxhbxrxOuLwoZ8YvD8c6rQAdexMoHoeTvA1PAca4zZTo # ISmW3bXsoHN2uGLPz4CKhjKBLCANtDkh3EWCwRFkLSRCLSRDhKPrG1Ue3fOgQ6GO # riROcxbyYzvU/4uefSW+xG/Im9gftNF6occZZ59LrK7Xd8kwlb+E+EdsmzFw5f8O # Q9irVQ8pX9ZM4BK2KiT16nZ0uSRwJqSJKbLI670nUEsj1jQCIgU3srgZHjAIvoir # yivDs6oktgS/HkPD5CQoTX+fVDgEDM1TTF6P8r7uJopPXpzz+AHswfSJmg== # =RVCS # -----END PGP SIGNATURE----- # gpg: Signature made Mon 19 Sep 2022 09:41:43 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (21 commits) qboot: update to latest submodule build: remove extra parentheses causing missing rebuilds target/i386: introduce insn_get_addr target/i386: REPZ and REPNZ are mutually exclusive target/i386: fix INSERTQ implementation target/i386: correctly mask SSE4a bit indices in register operands audio: add help option for -audio and -audiodev tests/tcg: remove old SSE tests tests/tcg: refine MMX support in SSE tests tests/tcg: i386: add MMX and 3DNow! tests tests/tcg: i386: fix typos in 3DNow! instructions tests: unit: add NULL-pointer check tests: test-qga: close socket on failure to connect tests: unit: simplify test-visitor-serialization list tests smbios: sanitize type from external type before checking have_fields_bitmap coverity: put NUBus under m68k component coverity: add new RISC-V component spapr_pci: fix leak in spapr_phb_vfio_get_loc_code kvm: fix memory leak on failure to read stats descriptors target/i386: Raise #GP on unaligned m128 accesses when required. ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-20Merge tag 'pull-loongarch-20220920' of https://gitlab.com/gaosong/qemu into ↵Stefan Hajnoczi6-152/+258
staging v2: fix compile error. # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCYymK3wAKCRBAov/yOSY+ # 31trA/oDy6CHaPvT9mwKOM/ScYcwCf+dEtFGkqpsjcPlEB7GLJ9moJxp1xlm+Htw # KA0MlA4QrI6MWd9udEbnoB7aRScG/ugzWHDPGocg+qjqiZvmHpE9ShdxYeDVJaLk # 6hN9dkom+ANWeZ7T4gmdQreK/lwjUAqkiPSjw1HhvSHr3kAeDA== # =uUxe # -----END PGP SIGNATURE----- # gpg: Signature made Tue 20 Sep 2022 05:41:51 EDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Can't check signature: No public key * tag 'pull-loongarch-20220920' of https://gitlab.com/gaosong/qemu: hw/loongarch: Improve acpi dsdt table hw/loongarch: Support memory hotplug hw/loongarch: Fix acpi ged irq number in dsdt table hw/loongarch: Add RAMFB to dynamic_sysbus_devices list hw/loongarch: Add hotplug handler for machine hw/loongarch: Add platform bus support hw/loongarch: Add interrupt information to FDT table hw/loongarch: Support fw_cfg dma function hw/loongarch: Remove vga device when loongarch init Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-09-20tests/docker: remove the Debian base imagesAlex Bennée6-74/+2
We no longer use these in any of our images. Clean-up the remaining comments and documentation that reference them and remove from the build. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-31-alex.bennee@linaro.org>
2022-09-20tests/docker: remove FROM qemu/ support from docker.pyAlex Bennée1-28/+10
We want to migrate from docker.py to building our images directly with docker/podman. Before we get there we need to make sure we don't re-introduce our layered builds so bug out if we see FROM qemu/ in a Dockerfile. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-30-alex.bennee@linaro.org>
2022-09-20tests/docker: update and flatten debian-toolchainAlex Bennée2-6/+3
Update to the latest stable Debian. While we are at it flatten into a single dockerfile as we do not need anything from the base image to build the toolchain. This is used to build both the nios and microblaze toolchains. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-29-alex.bennee@linaro.org>
2022-09-20tests/docker: update and flatten debian-hexagon-crossAlex Bennée1-7/+12
Update to the latest stable Debian. While we are at it flatten into a single dockerfile as we do not some of the extraneous packages from the base image to build the toolchain. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-28-alex.bennee@linaro.org>
2022-09-20tests/docker: update and flatten debian-loongarch-crossAlex Bennée2-4/+5
Update to the latest stable Debian. While we are at it flatten into a single dockerfile. We really don't need the rest of the stuff from the QEMU base image just to compile test images. In this case it is a binary distribution of the toolchain anyway. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220914155950.804707-27-alex.bennee@linaro.org>
2022-09-20tests/docker: update and flatten debian-amd64-crossAlex Bennée4-18/+169
Now lcitool has support for building a x86_64 cross image we can use it for this. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220914155950.804707-26-alex.bennee@linaro.org>
2022-09-20tests/lcitool: bump to latest versionAlex Bennée5-4/+5
We need this to be able to cleanly build the x86 cross images. There are a few minor updates triggered by lcitool-refresh including adding "libslirp" to the freebsd vars and opensuse-leap which will help when we finally drop the slirp submodule from QEMU. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220914155950.804707-25-alex.bennee@linaro.org>
2022-09-20tests/docker: update and flatten debian-all-test-crossAlex Bennée3-7/+13
Update to the latest stable Debian. While we are at it flatten into a single dockerfile. We also need to ensure we install clang as it is used for those builds as well. It would be nice to port this to lcitool but for now this will do. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-24-alex.bennee@linaro.org>
2022-09-20tests/docker: flatten debian-riscv64-test-crossAlex Bennée3-6/+6
Flatten into a single dockerfile and update to match the rest of the test cross compile dockerfiles. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-23-alex.bennee@linaro.org>
2022-09-20Deprecate 32 bit big-endian MIPSAlex Bennée6-47/+26
It's becoming harder to maintain a cross-compiler to test this host architecture as the old stable Debian 10 ("Buster") moved into LTS which supports fewer architectures. For now: - mark it's deprecation in the docs - downgrade the containers to build TCG tests only - drop the cross builds from our CI Users with an appropriate toolchain and user-space can still take their chances building it. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Huacai Chen <chenhuacai@kernel.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-22-alex.bennee@linaro.org>
2022-09-20gitlab-ci: update aarch32/aarch64 custom runner jobsAlex Bennée4-25/+24
The custom runner is now using 22.04 so we can drop our hacks to deal with broken libssh and glusterfs. The provisioning scripts will be updated in a separate commit. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220914155950.804707-21-alex.bennee@linaro.org>
2022-09-20gitlab-ci/custom-runners: Disable -static-pie for ubuntu-20.04-aarch64Richard Henderson1-1/+3
The project has reached the magic size at which we see /usr/aarch64-linux-gnu/lib/libc.a(init-first.o): in function `__libc_init_first': (.text+0x10): relocation truncated to fit: R_AARCH64_LD64_GOTPAGE_LO15 against \ symbol `__environ' defined in .bss section in /usr/aarch64-linux-gnu/lib/libc.a(environ.o) /usr/bin/ld: (.text+0x10): warning: too many GOT entries for -fpic, please recompile with -fPIC The bug has been reported upstream, but in the meantime there is nothing we can do except build a non-pie executable. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220823210329.1969895-1-richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220914155950.804707-20-alex.bennee@linaro.org>
2022-09-20configure: explicitly set cflags for --disable-pieAlex Bennée1-0/+3
This is working around current limitation of Meson's handling of --disable-pie. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220914155950.804707-19-alex.bennee@linaro.org>
2022-09-20hw/ppc/spapr: Fix code style problems reported by checkpatchBernhard Beschow1-2/+3
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20220919231720.163121-5-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20hw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failureXuzhou Cheng2-0/+2
pnv_phb3_root_bus_info and pnv_phb4_root_bus_info are missing the instance_size initialization. This results in accessing out-of-bound memory when setting 'chip-id' and 'phb-id', and eventually crashes glib's malloc functionality with the following message: "qemu-system-ppc64: GLib: ../glib-2.72.3/glib/gmem.c:131: failed to allocate 3232 bytes" This issue was noticed only when running qtests with QEMU Windows 32-bit executable. Windows 64-bit, Linux 32/64-bit do not expose this bug though. Fixes: 9ae1329ee2fe ("ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge") Fixes: 4f9924c4d4cf ("ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge") Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com> Signed-off-by: Bin Meng <bin.meng@windriver.com> Message-Id: <20220920103159.1865256-29-bmeng.cn@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-09-20hw/ppc: spapr: Use qemu_vfree() to free spapr->htabXuzhou Cheng1-1/+1
spapr->htab is allocated by qemu_memalign(), hence we should use qemu_vfree() to free it. Fixes: c5f54f3e31bf ("pseries: Move hash page table allocation to reset time") Fixes: b4db54132ffe ("target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL"") Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com> Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220920103159.1865256-28-bmeng.cn@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
generated by cgit v1.1 at 2024-08-06 15:25:23 +0000