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Diffstat (limited to 'target/xtensa/core-dsp3400.c')
-rw-r--r-- | target/xtensa/core-dsp3400.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/target/xtensa/core-dsp3400.c b/target/xtensa/core-dsp3400.c new file mode 100644 index 0000000..4e0bc8a --- /dev/null +++ b/target/xtensa/core-dsp3400.c @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2020, Max Filippov, Open Source and Linux Lab. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Open Source and Linux Lab nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "exec/gdbstub.h" +#include "qemu-common.h" +#include "qemu/host-utils.h" + +#include "core-dsp3400/core-isa.h" +#include "core-dsp3400/core-matmap.h" +#include "overlay_tool.h" + +#define xtensa_modules xtensa_modules_dsp3400 +#include "core-dsp3400/xtensa-modules.c.inc" + +static XtensaConfig dsp3400 __attribute__((unused)) = { + .name = "dsp3400", + .gdb_regmap = { + .reg = { +#include "core-dsp3400/gdb-config.c.inc" + } + }, + .isa_internal = &xtensa_modules, + .clock_freq_khz = 40000, + .opcode_translators = (const XtensaOpcodeTranslators *[]){ + &xtensa_core_opcodes, + &xtensa_fpu2000_opcodes, + NULL, + }, + DEFAULT_SECTIONS +}; + +REGISTER_CORE(dsp3400) |