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-rw-r--r--target/riscv/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 3a9e250..443d15a 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -395,7 +395,7 @@ OBJECT_DECLARE_CPU_TYPE(RISCVCPU, RISCVCPUClass, RISCV_CPU)
/**
* RISCVCPUClass:
* @parent_realize: The parent class' realize handler.
- * @parent_reset: The parent class' reset handler.
+ * @parent_phases: The parent class' reset phase handlers.
*
* A RISCV CPU model.
*/
@@ -404,7 +404,7 @@ struct RISCVCPUClass {
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
- DeviceReset parent_reset;
+ ResettablePhases parent_phases;
};
struct RISCVCPUConfig {