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Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/translate.c37
1 files changed, 12 insertions, 25 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index b28e8b9..8ba8f67 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3933,13 +3933,9 @@ static inline void gen_op_mfspr(DisasContext *ctx)
* allowing userland application to read the PVR
*/
if (sprn != SPR_PVR) {
- fprintf(stderr, "Trying to read privileged spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
- if (qemu_log_separate()) {
- qemu_log("Trying to read privileged spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn,
- ctx->base.pc_next - 4);
- }
+ qemu_log_mask(LOG_GUEST_ERROR, "Trying to read privileged spr "
+ "%d (0x%03x) at " TARGET_FMT_lx "\n", sprn, sprn,
+ ctx->base.pc_next - 4);
}
gen_priv_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
@@ -3951,12 +3947,9 @@ static inline void gen_op_mfspr(DisasContext *ctx)
return;
}
/* Not defined */
- fprintf(stderr, "Trying to read invalid spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
- if (qemu_log_separate()) {
- qemu_log("Trying to read invalid spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
- }
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "Trying to read invalid spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
/* The behaviour depends on MSR:PR and SPR# bit 0x10,
* it can generate a priv, a hv emu or a no-op
@@ -4097,12 +4090,9 @@ static void gen_mtspr(DisasContext *ctx)
(*write_cb)(ctx, sprn, rS(ctx->opcode));
} else {
/* Privilege exception */
- fprintf(stderr, "Trying to write privileged spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
- if (qemu_log_separate()) {
- qemu_log("Trying to write privileged spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
- }
+ qemu_log_mask(LOG_GUEST_ERROR, "Trying to write privileged spr "
+ "%d (0x%03x) at " TARGET_FMT_lx "\n", sprn, sprn,
+ ctx->base.pc_next - 4);
gen_priv_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
} else {
@@ -4114,12 +4104,9 @@ static void gen_mtspr(DisasContext *ctx)
}
/* Not defined */
- if (qemu_log_separate()) {
- qemu_log("Trying to write invalid spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
- }
- fprintf(stderr, "Trying to write invalid spr %d (0x%03x) at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "Trying to write invalid spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4);
/* The behaviour depends on MSR:PR and SPR# bit 0x10,