aboutsummaryrefslogtreecommitdiff
path: root/target/mips/msa.c
diff options
context:
space:
mode:
Diffstat (limited to 'target/mips/msa.c')
-rw-r--r--target/mips/msa.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/target/mips/msa.c b/target/mips/msa.c
index 61f1a9a..32c6acb 100644
--- a/target/mips/msa.c
+++ b/target/mips/msa.c
@@ -48,6 +48,35 @@ void msa_reset(CPUMIPSState *env)
/* tininess detected after rounding.*/
set_float_detect_tininess(float_tininess_after_rounding,
&env->active_tc.msa_fp_status);
+ /*
+ * MSACSR.FS detects tiny results to flush to zero before rounding
+ * (per "MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD
+ * Architecture Module, Revision 1.1" section 3.5.4), even though it
+ * detects tininess after rounding for underflow purposes (section 3.4.2
+ * table 3.3).
+ */
+ set_float_ftz_detection(float_ftz_before_rounding,
+ &env->active_tc.msa_fp_status);
+
+ /*
+ * According to MIPS specifications, if one of the two operands is
+ * a sNaN, a new qNaN has to be generated. This is done in
+ * floatXX_silence_nan(). For qNaN inputs the specifications
+ * says: "When possible, this QNaN result is one of the operand QNaN
+ * values." In practice it seems that most implementations choose
+ * the first operand if both operands are qNaN. In short this gives
+ * the following rules:
+ * 1. A if it is signaling
+ * 2. B if it is signaling
+ * 3. A (quiet)
+ * 4. B (quiet)
+ * A signaling NaN is always silenced before returning it.
+ */
+ set_float_2nan_prop_rule(float_2nan_prop_s_ab,
+ &env->active_tc.msa_fp_status);
+
+ set_float_3nan_prop_rule(float_3nan_prop_s_cab,
+ &env->active_tc.msa_fp_status);
/* clear float_status exception flags */
set_float_exception_flags(0, &env->active_tc.msa_fp_status);
@@ -57,4 +86,11 @@ void msa_reset(CPUMIPSState *env)
/* set proper signanling bit meaning ("1" means "quiet") */
set_snan_bit_is_one(0, &env->active_tc.msa_fp_status);
+
+ /* Inf * 0 + NaN returns the input NaN */
+ set_float_infzeronan_rule(float_infzeronan_dnan_never,
+ &env->active_tc.msa_fp_status);
+ /* Default NaN: sign bit clear, frac msb set */
+ set_float_default_nan_pattern(0b01000000,
+ &env->active_tc.msa_fp_status);
}