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Diffstat (limited to 'target/microblaze/helper.c')
-rw-r--r--target/microblaze/helper.c26
1 files changed, 23 insertions, 3 deletions
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index cda14a1..20dbd67 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -46,6 +46,16 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
#else /* !CONFIG_USER_ONLY */
+static bool mb_cpu_access_is_secure(MicroBlazeCPU *cpu,
+ MMUAccessType access_type)
+{
+ if (access_type == MMU_INST_FETCH) {
+ return !cpu->ns_axi_ip;
+ } else {
+ return !cpu->ns_axi_dp;
+ }
+}
+
bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
@@ -55,12 +65,16 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MicroBlazeMMULookup lu;
unsigned int hit;
int prot;
+ MemTxAttrs attrs = {};
+
+ attrs.secure = mb_cpu_access_is_secure(cpu, access_type);
if (mmu_idx == MMU_NOMMU_IDX) {
/* MMU disabled or not available. */
address &= TARGET_PAGE_MASK;
prot = PAGE_BITS;
- tlb_set_page(cs, address, address, prot, mmu_idx, TARGET_PAGE_SIZE);
+ tlb_set_page_with_attrs(cs, address, address, attrs, prot, mmu_idx,
+ TARGET_PAGE_SIZE);
return true;
}
@@ -71,7 +85,8 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
qemu_log_mask(CPU_LOG_MMU, "MMU map mmu=%d v=%x p=%x prot=%x\n",
mmu_idx, vaddr, paddr, lu.prot);
- tlb_set_page(cs, vaddr, paddr, lu.prot, mmu_idx, TARGET_PAGE_SIZE);
+ tlb_set_page_with_attrs(cs, vaddr, paddr, attrs, lu.prot, mmu_idx,
+ TARGET_PAGE_SIZE);
return true;
}
@@ -230,7 +245,8 @@ void mb_cpu_do_interrupt(CPUState *cs)
}
}
-hwaddr mb_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
+hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr,
+ MemTxAttrs *attrs)
{
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
CPUMBState *env = &cpu->env;
@@ -239,6 +255,10 @@ hwaddr mb_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
int mmu_idx = cpu_mmu_index(env, false);
unsigned int hit;
+ /* Caller doesn't initialize */
+ *attrs = (MemTxAttrs) {};
+ attrs->secure = mb_cpu_access_is_secure(cpu, MMU_DATA_LOAD);
+
if (mmu_idx != MMU_NOMMU_IDX) {
hit = mmu_translate(cpu, &lu, addr, 0, 0);
if (hit) {