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path: root/target/hexagon/genptr.c
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Diffstat (limited to 'target/hexagon/genptr.c')
-rw-r--r--target/hexagon/genptr.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index dbae6c5..08fc541 100644
--- a/target/hexagon/genptr.c
+++ b/target/hexagon/genptr.c
@@ -100,10 +100,6 @@ void gen_log_reg_write(DisasContext *ctx, int rnum, TCGv val)
gen_masked_reg_write(val, hex_gpr[rnum], reg_mask);
tcg_gen_mov_tl(get_result_gpr(ctx, rnum), val);
- if (HEX_DEBUG) {
- /* Do this so HELPER(debug_commit_end) will know */
- tcg_gen_movi_tl(hex_reg_written[rnum], 1);
- }
}
static void gen_log_reg_write_pair(DisasContext *ctx, int rnum, TCGv_i64 val)
@@ -151,9 +147,6 @@ void gen_log_pred_write(DisasContext *ctx, int pnum, TCGv val)
} else {
tcg_gen_and_tl(pred, pred, base_val);
}
- if (HEX_DEBUG) {
- tcg_gen_ori_tl(ctx->pred_written, ctx->pred_written, 1 << pnum);
- }
set_bit(pnum, ctx->pregs_written);
}
@@ -336,14 +329,14 @@ void gen_set_byte_i64(int N, TCGv_i64 result, TCGv src)
static inline void gen_load_locked4u(TCGv dest, TCGv vaddr, int mem_index)
{
- tcg_gen_qemu_ld_tl(dest, vaddr, mem_index, MO_TEUL);
+ tcg_gen_qemu_ld_tl(dest, vaddr, mem_index, MO_LE | MO_UL);
tcg_gen_mov_tl(hex_llsc_addr, vaddr);
tcg_gen_mov_tl(hex_llsc_val, dest);
}
static inline void gen_load_locked8u(TCGv_i64 dest, TCGv vaddr, int mem_index)
{
- tcg_gen_qemu_ld_i64(dest, vaddr, mem_index, MO_TEUQ);
+ tcg_gen_qemu_ld_i64(dest, vaddr, mem_index, MO_LE | MO_UQ);
tcg_gen_mov_tl(hex_llsc_addr, vaddr);
tcg_gen_mov_i64(hex_llsc_val_i64, dest);
}
@@ -763,7 +756,7 @@ static void gen_load_frame(DisasContext *ctx, TCGv_i64 frame, TCGv EA)
{
Insn *insn = ctx->insn; /* Needed for CHECK_NOSHUF */
CHECK_NOSHUF(EA, 8);
- tcg_gen_qemu_ld_i64(frame, EA, ctx->mem_idx, MO_TEUQ);
+ tcg_gen_qemu_ld_i64(frame, EA, ctx->mem_idx, MO_LE | MO_UQ);
}
#ifndef CONFIG_HEXAGON_IDEF_PARSER
@@ -1237,7 +1230,7 @@ static void gen_vreg_load(DisasContext *ctx, intptr_t dstoff, TCGv src,
tcg_gen_andi_tl(src, src, ~((int32_t)sizeof(MMVector) - 1));
}
for (int i = 0; i < sizeof(MMVector) / 8; i++) {
- tcg_gen_qemu_ld_i64(tmp, src, ctx->mem_idx, MO_TEUQ);
+ tcg_gen_qemu_ld_i64(tmp, src, ctx->mem_idx, MO_LE | MO_UQ);
tcg_gen_addi_tl(src, src, 8);
tcg_gen_st_i64(tmp, tcg_env, dstoff + i * 8);
}