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-rw-r--r--target/arm/cpu.h29
1 files changed, 14 insertions, 15 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5877d76..2ce47f8 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -807,6 +807,19 @@ typedef enum ARMPSCIState {
typedef struct ARMISARegisters ARMISARegisters;
+/*
+ * In map, each set bit is a supported vector length of (bit-number + 1) * 16
+ * bytes, i.e. each bit number + 1 is the vector length in quadwords.
+ *
+ * While processing properties during initialization, corresponding init bits
+ * are set for bits in sve_vq_map that have been set by properties.
+ *
+ * Bits set in supported represent valid vector lengths for the CPU type.
+ */
+typedef struct {
+ uint32_t map, init, supported;
+} ARMVQMap;
+
/**
* ARMCPU:
* @env: #CPUARMState
@@ -1055,21 +1068,7 @@ struct ArchCPU {
uint32_t sve_default_vq;
#endif
- /*
- * In sve_vq_map each set bit is a supported vector length of
- * (bit-number + 1) * 16 bytes, i.e. each bit number + 1 is the vector
- * length in quadwords.
- *
- * While processing properties during initialization, corresponding
- * sve_vq_init bits are set for bits in sve_vq_map that have been
- * set by properties.
- *
- * Bits set in sve_vq_supported represent valid vector lengths for
- * the CPU type.
- */
- uint32_t sve_vq_map;
- uint32_t sve_vq_init;
- uint32_t sve_vq_supported;
+ ARMVQMap sve_vq;
/* Generic timer counter frequency, in Hz */
uint64_t gt_cntfrq_hz;