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Diffstat (limited to 'include/qemu/atomic.h')
-rw-r--r--include/qemu/atomic.h62
1 files changed, 4 insertions, 58 deletions
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index 99110ab..f80cba2 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -20,48 +20,6 @@
/* Compiler barrier */
#define barrier() ({ asm volatile("" ::: "memory"); (void)0; })
-/* The variable that receives the old value of an atomically-accessed
- * variable must be non-qualified, because atomic builtins return values
- * through a pointer-type argument as in __atomic_load(&var, &old, MODEL).
- *
- * This macro has to handle types smaller than int manually, because of
- * implicit promotion. int and larger types, as well as pointers, can be
- * converted to a non-qualified type just by applying a binary operator.
- */
-#define typeof_strip_qual(expr) \
- typeof( \
- __builtin_choose_expr( \
- __builtin_types_compatible_p(typeof(expr), bool) || \
- __builtin_types_compatible_p(typeof(expr), const bool) || \
- __builtin_types_compatible_p(typeof(expr), volatile bool) || \
- __builtin_types_compatible_p(typeof(expr), const volatile bool), \
- (bool)1, \
- __builtin_choose_expr( \
- __builtin_types_compatible_p(typeof(expr), signed char) || \
- __builtin_types_compatible_p(typeof(expr), const signed char) || \
- __builtin_types_compatible_p(typeof(expr), volatile signed char) || \
- __builtin_types_compatible_p(typeof(expr), const volatile signed char), \
- (signed char)1, \
- __builtin_choose_expr( \
- __builtin_types_compatible_p(typeof(expr), unsigned char) || \
- __builtin_types_compatible_p(typeof(expr), const unsigned char) || \
- __builtin_types_compatible_p(typeof(expr), volatile unsigned char) || \
- __builtin_types_compatible_p(typeof(expr), const volatile unsigned char), \
- (unsigned char)1, \
- __builtin_choose_expr( \
- __builtin_types_compatible_p(typeof(expr), signed short) || \
- __builtin_types_compatible_p(typeof(expr), const signed short) || \
- __builtin_types_compatible_p(typeof(expr), volatile signed short) || \
- __builtin_types_compatible_p(typeof(expr), const volatile signed short), \
- (signed short)1, \
- __builtin_choose_expr( \
- __builtin_types_compatible_p(typeof(expr), unsigned short) || \
- __builtin_types_compatible_p(typeof(expr), const unsigned short) || \
- __builtin_types_compatible_p(typeof(expr), volatile unsigned short) || \
- __builtin_types_compatible_p(typeof(expr), const volatile unsigned short), \
- (unsigned short)1, \
- (expr)+0))))))
-
#ifndef __ATOMIC_RELAXED
#error "Expecting C11 atomic ops"
#endif
@@ -98,25 +56,13 @@
*/
#define signal_barrier() __atomic_signal_fence(__ATOMIC_SEQ_CST)
-/* Sanity check that the size of an atomic operation isn't "overly large".
+/*
+ * Sanity check that the size of an atomic operation isn't "overly large".
* Despite the fact that e.g. i686 has 64-bit atomic operations, we do not
* want to use them because we ought not need them, and this lets us do a
* bit of sanity checking that other 32-bit hosts might build.
- *
- * That said, we have a problem on 64-bit ILP32 hosts in that in order to
- * sync with TCG_OVERSIZED_GUEST, this must match TCG_TARGET_REG_BITS.
- * We'd prefer not want to pull in everything else TCG related, so handle
- * those few cases by hand.
- *
- * Note that x32 is fully detected with __x86_64__ + _ILP32, and that for
- * Sparc we always force the use of sparcv9 in configure. MIPS n32 (ILP32) &
- * n64 (LP64) ABIs are both detected using __mips64.
*/
-#if defined(__x86_64__) || defined(__sparc__) || defined(__mips64)
-# define ATOMIC_REG_SIZE 8
-#else
-# define ATOMIC_REG_SIZE sizeof(void *)
-#endif
+#define ATOMIC_REG_SIZE sizeof(void *)
/* Weak atomic operations prevent the compiler moving other
* loads/stores past the atomic operation load/store. However there is
@@ -170,7 +116,7 @@
_val; \
})
#define qatomic_rcu_read(ptr) \
- qatomic_rcu_read_internal((ptr), MAKE_IDENTFIER(_val))
+ qatomic_rcu_read_internal((ptr), MAKE_IDENTIFIER(_val))
#define qatomic_rcu_set(ptr, i) do { \
qemu_build_assert(sizeof(*ptr) <= ATOMIC_REG_SIZE); \