diff options
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/sd/sd.h | 20 | ||||
| -rw-r--r-- | include/hw/sd/sdhci.h | 6 |
2 files changed, 25 insertions, 1 deletions
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index 96caefe..bf1eb07 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -56,6 +56,20 @@ #define OCR_CCS_BITN 30 typedef enum { + SD_VOLTAGE_0_4V = 400, /* currently not supported */ + SD_VOLTAGE_1_8V = 1800, + SD_VOLTAGE_3_0V = 3000, + SD_VOLTAGE_3_3V = 3300, +} sd_voltage_mv_t; + +typedef enum { + UHS_NOT_SUPPORTED = 0, + UHS_I = 1, + UHS_II = 2, /* currently not supported */ + UHS_III = 3, /* currently not supported */ +} sd_uhs_mode_t; + +typedef enum { sd_none = -1, sd_bc = 0, /* broadcast -- no response */ sd_bcr, /* broadcast with response */ @@ -88,6 +102,9 @@ typedef struct { void (*write_data)(SDState *sd, uint8_t value); uint8_t (*read_data)(SDState *sd); bool (*data_ready)(SDState *sd); + void (*set_voltage)(SDState *sd, uint16_t millivolts); + uint8_t (*get_dat_lines)(SDState *sd); + bool (*get_cmd_line)(SDState *sd); void (*enable)(SDState *sd, bool enable); bool (*get_inserted)(SDState *sd); bool (*get_readonly)(SDState *sd); @@ -134,6 +151,9 @@ void sd_enable(SDState *sd, bool enable); /* Functions to be used by qdevified callers (working via * an SDBus rather than directly with SDState) */ +void sdbus_set_voltage(SDBus *sdbus, uint16_t millivolts); +uint8_t sdbus_get_dat_lines(SDBus *sdbus); +bool sdbus_get_cmd_line(SDBus *sdbus); int sdbus_do_command(SDBus *sd, SDRequest *req, uint8_t *response); void sdbus_write_data(SDBus *sd, uint8_t value); uint8_t sdbus_read_data(SDBus *sd); diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index f8d1ba3..f321767 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -59,7 +59,7 @@ typedef struct SDHCIState { uint16_t cmdreg; /* Command Register */ uint32_t rspreg[4]; /* Response Registers 0-3 */ uint32_t prnsts; /* Present State Register */ - uint8_t hostctl; /* Host Control Register */ + uint8_t hostctl1; /* Host Control Register */ uint8_t pwrcon; /* Power control Register */ uint8_t blkgap; /* Block Gap Control Register */ uint8_t wakcon; /* WakeUp Control Register */ @@ -73,11 +73,13 @@ typedef struct SDHCIState { uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */ uint16_t errintsigen; /* Error Interrupt Signal Enable Register */ uint16_t acmd12errsts; /* Auto CMD12 error status register */ + uint16_t hostctl2; /* Host Control 2 */ uint64_t admasysaddr; /* ADMA System Address Register */ /* Read-only registers */ uint64_t capareg; /* Capabilities Register */ uint64_t maxcurr; /* Maximum Current Capabilities Register */ + uint16_t version; /* Host Controller Version Register */ uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */ uint32_t buf_maxsz; @@ -93,6 +95,8 @@ typedef struct SDHCIState { /* Configurable properties */ bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ uint32_t quirks; + uint8_t sd_spec_version; + uint8_t uhs_mode; } SDHCIState; /* |