diff options
Diffstat (limited to 'include/exec')
35 files changed, 961 insertions, 5710 deletions
diff --git a/include/exec/address-spaces.h b/include/exec/address-spaces.h deleted file mode 100644 index 0d0aa61..0000000 --- a/include/exec/address-spaces.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Internal memory management interfaces - * - * Copyright 2011 Red Hat, Inc. and/or its affiliates - * - * Authors: - * Avi Kivity <avi@redhat.com> - * - * This work is licensed under the terms of the GNU GPL, version 2. See - * the COPYING file in the top-level directory. - * - */ - -#ifndef EXEC_ADDRESS_SPACES_H -#define EXEC_ADDRESS_SPACES_H - -/* - * Internal interfaces between memory.c/exec.c/vl.c. Do not #include unless - * you're one of them. - */ - -#ifndef CONFIG_USER_ONLY - -/* Get the root memory region. This interface should only be used temporarily - * until a proper bus interface is available. - */ -MemoryRegion *get_system_memory(void); - -/* Get the root I/O port region. This interface should only be used - * temporarily until a proper bus interface is available. - */ -MemoryRegion *get_system_io(void); - -extern AddressSpace address_space_memory; -extern AddressSpace address_space_io; - -#endif - -#endif diff --git a/include/exec/confidential-guest-support.h b/include/exec/confidential-guest-support.h deleted file mode 100644 index 02dc4e5..0000000 --- a/include/exec/confidential-guest-support.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * QEMU Confidential Guest support - * This interface describes the common pieces between various - * schemes for protecting guest memory or other state against a - * compromised hypervisor. This includes memory encryption (AMD's - * SEV and Intel's MKTME) or special protection modes (PEF on POWER, - * or PV on s390x). - * - * Copyright Red Hat. - * - * Authors: - * David Gibson <david@gibson.dropbear.id.au> - * - * This work is licensed under the terms of the GNU GPL, version 2 or - * later. See the COPYING file in the top-level directory. - * - */ -#ifndef QEMU_CONFIDENTIAL_GUEST_SUPPORT_H -#define QEMU_CONFIDENTIAL_GUEST_SUPPORT_H - -#ifndef CONFIG_USER_ONLY - -#include "qom/object.h" - -#define TYPE_CONFIDENTIAL_GUEST_SUPPORT "confidential-guest-support" -OBJECT_DECLARE_TYPE(ConfidentialGuestSupport, - ConfidentialGuestSupportClass, - CONFIDENTIAL_GUEST_SUPPORT) - - -struct ConfidentialGuestSupport { - Object parent; - - /* - * True if the machine should use guest_memfd for RAM. - */ - bool require_guest_memfd; - - /* - * ready: flag set by CGS initialization code once it's ready to - * start executing instructions in a potentially-secure - * guest - * - * The definition here is a bit fuzzy, because this is essentially - * part of a self-sanity-check, rather than a strict mechanism. - * - * It's not feasible to have a single point in the common machine - * init path to configure confidential guest support, because - * different mechanisms have different interdependencies requiring - * initialization in different places, often in arch or machine - * type specific code. It's also usually not possible to check - * for invalid configurations until that initialization code. - * That means it would be very easy to have a bug allowing CGS - * init to be bypassed entirely in certain configurations. - * - * Silently ignoring a requested security feature would be bad, so - * to avoid that we check late in init that this 'ready' flag is - * set if CGS was requested. If the CGS init hasn't happened, and - * so 'ready' is not set, we'll abort. - */ - bool ready; -}; - -typedef struct ConfidentialGuestSupportClass { - ObjectClass parent; - - int (*kvm_init)(ConfidentialGuestSupport *cgs, Error **errp); - int (*kvm_reset)(ConfidentialGuestSupport *cgs, Error **errp); -} ConfidentialGuestSupportClass; - -static inline int confidential_guest_kvm_init(ConfidentialGuestSupport *cgs, - Error **errp) -{ - ConfidentialGuestSupportClass *klass; - - klass = CONFIDENTIAL_GUEST_SUPPORT_GET_CLASS(cgs); - if (klass->kvm_init) { - return klass->kvm_init(cgs, errp); - } - - return 0; -} - -static inline int confidential_guest_kvm_reset(ConfidentialGuestSupport *cgs, - Error **errp) -{ - ConfidentialGuestSupportClass *klass; - - klass = CONFIDENTIAL_GUEST_SUPPORT_GET_CLASS(cgs); - if (klass->kvm_reset) { - return klass->kvm_reset(cgs, errp); - } - - return 0; -} - -#endif /* !CONFIG_USER_ONLY */ - -#endif /* QEMU_CONFIDENTIAL_GUEST_SUPPORT_H */ diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h deleted file mode 100644 index 6f09b86..0000000 --- a/include/exec/cpu-all.h +++ /dev/null @@ -1,375 +0,0 @@ -/* - * defines common to all virtual CPUs - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ -#ifndef CPU_ALL_H -#define CPU_ALL_H - -#include "exec/page-protection.h" -#include "exec/cpu-common.h" -#include "exec/memory.h" -#include "exec/tswap.h" -#include "hw/core/cpu.h" - -/* some important defines: - * - * HOST_BIG_ENDIAN : whether the host cpu is big endian and - * otherwise little endian. - * - * TARGET_BIG_ENDIAN : same for the target cpu - */ - -#if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN -#define BSWAP_NEEDED -#endif - -/* Target-endianness CPU memory access functions. These fit into the - * {ld,st}{type}{sign}{size}{endian}_p naming scheme described in bswap.h. - */ -#if TARGET_BIG_ENDIAN -#define lduw_p(p) lduw_be_p(p) -#define ldsw_p(p) ldsw_be_p(p) -#define ldl_p(p) ldl_be_p(p) -#define ldq_p(p) ldq_be_p(p) -#define stw_p(p, v) stw_be_p(p, v) -#define stl_p(p, v) stl_be_p(p, v) -#define stq_p(p, v) stq_be_p(p, v) -#define ldn_p(p, sz) ldn_be_p(p, sz) -#define stn_p(p, sz, v) stn_be_p(p, sz, v) -#else -#define lduw_p(p) lduw_le_p(p) -#define ldsw_p(p) ldsw_le_p(p) -#define ldl_p(p) ldl_le_p(p) -#define ldq_p(p) ldq_le_p(p) -#define stw_p(p, v) stw_le_p(p, v) -#define stl_p(p, v) stl_le_p(p, v) -#define stq_p(p, v) stq_le_p(p, v) -#define ldn_p(p, sz) ldn_le_p(p, sz) -#define stn_p(p, sz, v) stn_le_p(p, sz, v) -#endif - -/* MMU memory access macros */ - -#if defined(CONFIG_USER_ONLY) -#include "user/abitypes.h" - -/* - * If non-zero, the guest virtual address space is a contiguous subset - * of the host virtual address space, i.e. '-R reserved_va' is in effect - * either from the command-line or by default. The value is the last - * byte of the guest address space e.g. UINT32_MAX. - * - * If zero, the host and guest virtual address spaces are intermingled. - */ -extern unsigned long reserved_va; - -/* - * Limit the guest addresses as best we can. - * - * When not using -R reserved_va, we cannot really limit the guest - * to less address space than the host. For 32-bit guests, this - * acts as a sanity check that we're not giving the guest an address - * that it cannot even represent. For 64-bit guests... the address - * might not be what the real kernel would give, but it is at least - * representable in the guest. - * - * TODO: Improve address allocation to avoid this problem, and to - * avoid setting bits at the top of guest addresses that might need - * to be used for tags. - */ -#define GUEST_ADDR_MAX_ \ - ((MIN_CONST(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) ? \ - UINT32_MAX : ~0ul) -#define GUEST_ADDR_MAX (reserved_va ? : GUEST_ADDR_MAX_) - -#else - -#include "exec/hwaddr.h" - -#define SUFFIX -#define ARG1 as -#define ARG1_DECL AddressSpace *as -#define TARGET_ENDIANNESS -#include "exec/memory_ldst.h.inc" - -#define SUFFIX _cached_slow -#define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache -#define TARGET_ENDIANNESS -#include "exec/memory_ldst.h.inc" - -static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val) -{ - address_space_stl_notdirty(as, addr, val, - MEMTXATTRS_UNSPECIFIED, NULL); -} - -#define SUFFIX -#define ARG1 as -#define ARG1_DECL AddressSpace *as -#define TARGET_ENDIANNESS -#include "exec/memory_ldst_phys.h.inc" - -/* Inline fast path for direct RAM access. */ -#define ENDIANNESS -#include "exec/memory_ldst_cached.h.inc" - -#define SUFFIX _cached -#define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache -#define TARGET_ENDIANNESS -#include "exec/memory_ldst_phys.h.inc" -#endif - -/* page related stuff */ - -#ifdef TARGET_PAGE_BITS_VARY -# include "exec/page-vary.h" -extern const TargetPageBits target_page; -# ifdef CONFIG_DEBUG_TCG -# define TARGET_PAGE_BITS ({ assert(target_page.decided); \ - target_page.bits; }) -# define TARGET_PAGE_MASK ({ assert(target_page.decided); \ - (target_long)target_page.mask; }) -# else -# define TARGET_PAGE_BITS target_page.bits -# define TARGET_PAGE_MASK ((target_long)target_page.mask) -# endif -# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) -#else -# define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS -# define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -# define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) -#endif - -#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) - -#if defined(CONFIG_USER_ONLY) -void page_dump(FILE *f); - -typedef int (*walk_memory_regions_fn)(void *, target_ulong, - target_ulong, unsigned long); -int walk_memory_regions(void *, walk_memory_regions_fn); - -int page_get_flags(target_ulong address); -void page_set_flags(target_ulong start, target_ulong last, int flags); -void page_reset_target_data(target_ulong start, target_ulong last); - -/** - * page_check_range - * @start: first byte of range - * @len: length of range - * @flags: flags required for each page - * - * Return true if every page in [@start, @start+@len) has @flags set. - * Return false if any page is unmapped. Thus testing flags == 0 is - * equivalent to testing for flags == PAGE_VALID. - */ -bool page_check_range(target_ulong start, target_ulong last, int flags); - -/** - * page_check_range_empty: - * @start: first byte of range - * @last: last byte of range - * Context: holding mmap lock - * - * Return true if the entire range [@start, @last] is unmapped. - * The memory lock must be held so that the caller will can ensure - * the result stays true until a new mapping can be installed. - */ -bool page_check_range_empty(target_ulong start, target_ulong last); - -/** - * page_find_range_empty - * @min: first byte of search range - * @max: last byte of search range - * @len: size of the hole required - * @align: alignment of the hole required (power of 2) - * - * If there is a range [x, x+@len) within [@min, @max] such that - * x % @align == 0, then return x. Otherwise return -1. - * The memory lock must be held, as the caller will want to ensure - * the returned range stays empty until a new mapping can be installed. - */ -target_ulong page_find_range_empty(target_ulong min, target_ulong max, - target_ulong len, target_ulong align); - -/** - * page_get_target_data(address) - * @address: guest virtual address - * - * Return TARGET_PAGE_DATA_SIZE bytes of out-of-band data to associate - * with the guest page at @address, allocating it if necessary. The - * caller should already have verified that the address is valid. - * - * The memory will be freed when the guest page is deallocated, - * e.g. with the munmap system call. - */ -void *page_get_target_data(target_ulong address) - __attribute__((returns_nonnull)); -#endif - -CPUArchState *cpu_copy(CPUArchState *env); - -/* Flags for use in ENV->INTERRUPT_PENDING. - - The numbers assigned here are non-sequential in order to preserve - binary compatibility with the vmstate dump. Bit 0 (0x0001) was - previously used for CPU_INTERRUPT_EXIT, and is cleared when loading - the vmstate dump. */ - -/* External hardware interrupt pending. This is typically used for - interrupts from devices. */ -#define CPU_INTERRUPT_HARD 0x0002 - -/* Exit the current TB. This is typically used when some system-level device - makes some change to the memory mapping. E.g. the a20 line change. */ -#define CPU_INTERRUPT_EXITTB 0x0004 - -/* Halt the CPU. */ -#define CPU_INTERRUPT_HALT 0x0020 - -/* Debug event pending. */ -#define CPU_INTERRUPT_DEBUG 0x0080 - -/* Reset signal. */ -#define CPU_INTERRUPT_RESET 0x0400 - -/* Several target-specific external hardware interrupts. Each target/cpu.h - should define proper names based on these defines. */ -#define CPU_INTERRUPT_TGT_EXT_0 0x0008 -#define CPU_INTERRUPT_TGT_EXT_1 0x0010 -#define CPU_INTERRUPT_TGT_EXT_2 0x0040 -#define CPU_INTERRUPT_TGT_EXT_3 0x0200 -#define CPU_INTERRUPT_TGT_EXT_4 0x1000 - -/* Several target-specific internal interrupts. These differ from the - preceding target-specific interrupts in that they are intended to - originate from within the cpu itself, typically in response to some - instruction being executed. These, therefore, are not masked while - single-stepping within the debugger. */ -#define CPU_INTERRUPT_TGT_INT_0 0x0100 -#define CPU_INTERRUPT_TGT_INT_1 0x0800 -#define CPU_INTERRUPT_TGT_INT_2 0x2000 - -/* First unused bit: 0x4000. */ - -/* The set of all bits that should be masked when single-stepping. */ -#define CPU_INTERRUPT_SSTEP_MASK \ - (CPU_INTERRUPT_HARD \ - | CPU_INTERRUPT_TGT_EXT_0 \ - | CPU_INTERRUPT_TGT_EXT_1 \ - | CPU_INTERRUPT_TGT_EXT_2 \ - | CPU_INTERRUPT_TGT_EXT_3 \ - | CPU_INTERRUPT_TGT_EXT_4) - -#ifdef CONFIG_USER_ONLY - -/* - * Allow some level of source compatibility with softmmu. We do not - * support any of the more exotic features, so only invalid pages may - * be signaled by probe_access_flags(). - */ -#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1)) -#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2)) -#define TLB_WATCHPOINT 0 - -static inline int cpu_mmu_index(CPUState *cs, bool ifetch) -{ - return MMU_USER_IDX; -} -#else - -/* - * Flags stored in the low bits of the TLB virtual address. - * These are defined so that fast path ram access is all zeros. - * The flags all must be between TARGET_PAGE_BITS and - * maximum address alignment bit. - * - * Use TARGET_PAGE_BITS_MIN so that these bits are constant - * when TARGET_PAGE_BITS_VARY is in effect. - * - * The count, if not the placement of these bits is known - * to tcg/tcg-op-ldst.c, check_max_alignment(). - */ -/* Zero if TLB entry is valid. */ -#define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1)) -/* Set if TLB entry references a clean RAM page. The iotlb entry will - contain the page physical address. */ -#define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS_MIN - 2)) -/* Set if TLB entry is an IO callback. */ -#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 3)) -/* Set if TLB entry writes ignored. */ -#define TLB_DISCARD_WRITE (1 << (TARGET_PAGE_BITS_MIN - 4)) -/* Set if the slow path must be used; more flags in CPUTLBEntryFull. */ -#define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 5)) - -/* - * Use this mask to check interception with an alignment mask - * in a TCG backend. - */ -#define TLB_FLAGS_MASK \ - (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \ - | TLB_FORCE_SLOW | TLB_DISCARD_WRITE) - -/* - * Flags stored in CPUTLBEntryFull.slow_flags[x]. - * TLB_FORCE_SLOW must be set in CPUTLBEntry.addr_idx[x]. - */ -/* Set if TLB entry requires byte swap. */ -#define TLB_BSWAP (1 << 0) -/* Set if TLB entry contains a watchpoint. */ -#define TLB_WATCHPOINT (1 << 1) -/* Set if TLB entry requires aligned accesses. */ -#define TLB_CHECK_ALIGNED (1 << 2) - -#define TLB_SLOW_FLAGS_MASK (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED) - -/* The two sets of flags must not overlap. */ -QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK); - -/** - * tlb_hit_page: return true if page aligned @addr is a hit against the - * TLB entry @tlb_addr - * - * @addr: virtual address to test (must be page aligned) - * @tlb_addr: TLB entry address (a CPUTLBEntry addr_read/write/code value) - */ -static inline bool tlb_hit_page(uint64_t tlb_addr, vaddr addr) -{ - return addr == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)); -} - -/** - * tlb_hit: return true if @addr is a hit against the TLB entry @tlb_addr - * - * @addr: virtual address to test (need not be page aligned) - * @tlb_addr: TLB entry address (a CPUTLBEntry addr_read/write/code value) - */ -static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr) -{ - return tlb_hit_page(tlb_addr, addr & TARGET_PAGE_MASK); -} - -#endif /* !CONFIG_USER_ONLY */ - -/* Validate correct placement of CPUArchState. */ -#include "cpu.h" -QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); -QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); - -#endif /* CPU_ALL_H */ diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 2e1b499..a684855 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -9,9 +9,7 @@ #define CPU_COMMON_H #include "exec/vaddr.h" -#ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" -#endif #include "hw/core/cpu.h" #include "tcg/debug-assert.h" #include "exec/page-protection.h" @@ -40,20 +38,12 @@ int cpu_get_free_index(void); void tcg_iommu_init_notifier_list(CPUState *cpu); void tcg_iommu_free_notifier_list(CPUState *cpu); -#if !defined(CONFIG_USER_ONLY) - enum device_endian { DEVICE_NATIVE_ENDIAN, DEVICE_BIG_ENDIAN, DEVICE_LITTLE_ENDIAN, }; -#if HOST_BIG_ENDIAN -#define DEVICE_HOST_ENDIAN DEVICE_BIG_ENDIAN -#else -#define DEVICE_HOST_ENDIAN DEVICE_LITTLE_ENDIAN -#endif - /* address in the RAM (different from a physical address) */ #if defined(CONFIG_XEN_BACKEND) typedef uint64_t ram_addr_t; @@ -67,7 +57,7 @@ typedef uintptr_t ram_addr_t; /* memory API */ -void qemu_ram_remap(ram_addr_t addr, ram_addr_t length); +void qemu_ram_remap(ram_addr_t addr); /* This should not be used by devices. */ ram_addr_t qemu_ram_addr_from_host(void *ptr); ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr); @@ -176,8 +166,6 @@ int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length); int ram_block_discard_guest_memfd_range(RAMBlock *rb, uint64_t start, size_t length); -#endif - /* Returns: 0 on success, -1 on error */ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, void *ptr, size_t len, bool is_write); @@ -186,12 +174,7 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, void list_cpus(void); #ifdef CONFIG_TCG - -bool tcg_cflags_has(CPUState *cpu, uint32_t flags); -void tcg_cflags_set(CPUState *cpu, uint32_t flags); - -/* current cflags for hashing/comparison */ -uint32_t curr_cflags(CPUState *cpu); +#include "qemu/atomic.h" /** * cpu_unwind_state_data: @@ -199,7 +182,7 @@ uint32_t curr_cflags(CPUState *cpu); * @host_pc: the host pc within the translation * @data: output data * - * Attempt to load the the unwind state for a host pc occurring in + * Attempt to load the unwind state for a host pc occurring in * translated code. If @host_pc is not in translated code, the * function returns false; otherwise @data is loaded. * This is the same unwind info as given to restore_state_to_opc. @@ -218,6 +201,23 @@ bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); */ bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); +/** + * cpu_loop_exit_requested: + * @cpu: The CPU state to be tested + * + * Indicate if somebody asked for a return of the CPU to the main loop + * (e.g., via cpu_exit() or cpu_interrupt()). + * + * This is helpful for architectures that support interruptible + * instructions. After writing back all state to registers/memory, this + * call can be used to check if it makes sense to return to the main loop + * or to continue executing the interruptible instruction. + */ +static inline bool cpu_loop_exit_requested(CPUState *cpu) +{ + return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; +} + G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); #endif /* CONFIG_TCG */ @@ -239,34 +239,25 @@ static inline ArchCPU *env_archcpu(CPUArchState *env) } /** - * env_cpu(env) + * env_cpu_const(env) * @env: The architecture environment * * Return the CPUState associated with the environment. */ -static inline CPUState *env_cpu(CPUArchState *env) +static inline const CPUState *env_cpu_const(const CPUArchState *env) { return (void *)env - sizeof(CPUState); } -#ifndef CONFIG_USER_ONLY /** - * cpu_mmu_index: - * @env: The cpu environment - * @ifetch: True for code access, false for data access. - * - * Return the core mmu index for the current translation regime. - * This function is used by generic TCG code paths. + * env_cpu(env) + * @env: The architecture environment * - * The user-only version of this function is inline in cpu-all.h, - * where it always returns MMU_USER_IDX. + * Return the CPUState associated with the environment. */ -static inline int cpu_mmu_index(CPUState *cs, bool ifetch) +static inline CPUState *env_cpu(CPUArchState *env) { - int ret = cs->cc->mmu_index(cs, ifetch); - tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES); - return ret; + return (CPUState *)env_cpu_const(env); } -#endif /* !CONFIG_USER_ONLY */ #endif /* CPU_COMMON_H */ diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 0dbef30..e01acb7 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -23,14 +23,6 @@ #error cpu.h included from common code #endif -#include "qemu/host-utils.h" -#include "qemu/thread.h" -#ifndef CONFIG_USER_ONLY -#include "exec/hwaddr.h" -#endif -#include "exec/memattrs.h" -#include "hw/core/cpu.h" - #include "cpu-param.h" #ifndef TARGET_LONG_BITS @@ -42,42 +34,10 @@ #ifndef TARGET_VIRT_ADDR_SPACE_BITS # error TARGET_VIRT_ADDR_SPACE_BITS must be defined in cpu-param.h #endif -#ifndef TARGET_PAGE_BITS -# ifdef TARGET_PAGE_BITS_VARY -# ifndef TARGET_PAGE_BITS_MIN -# error TARGET_PAGE_BITS_MIN must be defined in cpu-param.h -# endif -# else -# error TARGET_PAGE_BITS must be defined in cpu-param.h -# endif +#if !defined(TARGET_PAGE_BITS) && !defined(TARGET_PAGE_BITS_VARY) +# error TARGET_PAGE_BITS must be defined in cpu-param.h #endif #include "exec/target_long.h" -#if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG) -#define CPU_TLB_DYN_MIN_BITS 6 -#define CPU_TLB_DYN_DEFAULT_BITS 8 - -# if HOST_LONG_BITS == 32 -/* Make sure we do not require a double-word shift for the TLB load */ -# define CPU_TLB_DYN_MAX_BITS (32 - TARGET_PAGE_BITS) -# else /* HOST_LONG_BITS == 64 */ -/* - * Assuming TARGET_PAGE_BITS==12, with 2**22 entries we can cover 2**(22+12) == - * 2**34 == 16G of address space. This is roughly what one would expect a - * TLB to cover in a modern (as of 2018) x86_64 CPU. For instance, Intel - * Skylake's Level-2 STLB has 16 1G entries. - * Also, make sure we do not size the TLB past the guest's address space. - */ -# ifdef TARGET_PAGE_BITS_VARY -# define CPU_TLB_DYN_MAX_BITS \ - MIN(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) -# else -# define CPU_TLB_DYN_MAX_BITS \ - MIN_CONST(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) -# endif -# endif - -#endif /* CONFIG_SOFTMMU && CONFIG_TCG */ - #endif diff --git a/include/exec/cpu-interrupt.h b/include/exec/cpu-interrupt.h new file mode 100644 index 0000000..4071519 --- /dev/null +++ b/include/exec/cpu-interrupt.h @@ -0,0 +1,70 @@ +/* + * Flags for use with cpu_interrupt() + * + * Copyright (c) 2003 Fabrice Bellard + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef CPU_INTERRUPT_H +#define CPU_INTERRUPT_H + +/* + * The numbers assigned here are non-sequential in order to preserve binary + * compatibility with the vmstate dump. Bit 0 (0x0001) was previously used + * for CPU_INTERRUPT_EXIT, and is cleared when loading the vmstate dump. + */ + +/* + * External hardware interrupt pending. + * This is typically used for interrupts from devices. + */ +#define CPU_INTERRUPT_HARD 0x0002 + +/* + * Exit the current TB. This is typically used when some system-level device + * makes some change to the memory mapping. E.g. the a20 line change. + */ +#define CPU_INTERRUPT_EXITTB 0x0004 + +/* Halt the CPU. */ +#define CPU_INTERRUPT_HALT 0x0020 + +/* Debug event pending. */ +#define CPU_INTERRUPT_DEBUG 0x0080 + +/* Reset signal. */ +#define CPU_INTERRUPT_RESET 0x0400 + +/* + * Several target-specific external hardware interrupts. Each target/cpu.h + * should define proper names based on these defines. + */ +#define CPU_INTERRUPT_TGT_EXT_0 0x0008 +#define CPU_INTERRUPT_TGT_EXT_1 0x0010 +#define CPU_INTERRUPT_TGT_EXT_2 0x0040 +#define CPU_INTERRUPT_TGT_EXT_3 0x0200 +#define CPU_INTERRUPT_TGT_EXT_4 0x1000 + +/* + * Several target-specific internal interrupts. These differ from the + * preceding target-specific interrupts in that they are intended to + * originate from within the cpu itself, typically in response to some + * instruction being executed. These, therefore, are not masked while + * single-stepping within the debugger. + */ +#define CPU_INTERRUPT_TGT_INT_0 0x0100 +#define CPU_INTERRUPT_TGT_INT_1 0x0800 +#define CPU_INTERRUPT_TGT_INT_2 0x2000 + +/* First unused bit: 0x4000. */ + +/* The set of all bits that should be masked when single-stepping. */ +#define CPU_INTERRUPT_SSTEP_MASK \ + (CPU_INTERRUPT_HARD \ + | CPU_INTERRUPT_TGT_EXT_0 \ + | CPU_INTERRUPT_TGT_EXT_1 \ + | CPU_INTERRUPT_TGT_EXT_2 \ + | CPU_INTERRUPT_TGT_EXT_3 \ + | CPU_INTERRUPT_TGT_EXT_4) + +#endif /* CPU_INTERRUPT_H */ diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h deleted file mode 100644 index dac12bd..0000000 --- a/include/exec/cpu_ldst.h +++ /dev/null @@ -1,416 +0,0 @@ -/* - * Software MMU support (per-target) - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - * - */ - -/* - * Generate inline load/store functions for all MMU modes (typically - * at least _user and _kernel) as well as _data versions, for all data - * sizes. - * - * Used by target op helpers. - * - * The syntax for the accessors is: - * - * load: cpu_ld{sign}{size}{end}_{mmusuffix}(env, ptr) - * cpu_ld{sign}{size}{end}_{mmusuffix}_ra(env, ptr, retaddr) - * cpu_ld{sign}{size}{end}_mmuidx_ra(env, ptr, mmu_idx, retaddr) - * cpu_ld{sign}{size}{end}_mmu(env, ptr, oi, retaddr) - * - * store: cpu_st{size}{end}_{mmusuffix}(env, ptr, val) - * cpu_st{size}{end}_{mmusuffix}_ra(env, ptr, val, retaddr) - * cpu_st{size}{end}_mmuidx_ra(env, ptr, val, mmu_idx, retaddr) - * cpu_st{size}{end}_mmu(env, ptr, val, oi, retaddr) - * - * sign is: - * (empty): for 32 and 64 bit sizes - * u : unsigned - * s : signed - * - * size is: - * b: 8 bits - * w: 16 bits - * l: 32 bits - * q: 64 bits - * - * end is: - * (empty): for target native endian, or for 8 bit access - * _be: for forced big endian - * _le: for forced little endian - * - * mmusuffix is one of the generic suffixes "data" or "code", or "mmuidx". - * The "mmuidx" suffix carries an extra mmu_idx argument that specifies - * the index to use; the "data" and "code" suffixes take the index from - * cpu_mmu_index(). - * - * The "mmu" suffix carries the full MemOpIdx, with both mmu_idx and the - * MemOp including alignment requirements. The alignment will be enforced. - */ -#ifndef CPU_LDST_H -#define CPU_LDST_H - -#ifndef CONFIG_TCG -#error Can only include this header with TCG -#endif - -#include "exec/memopidx.h" -#include "exec/abi_ptr.h" -#include "exec/mmu-access-type.h" -#include "qemu/int128.h" - -#if defined(CONFIG_USER_ONLY) - -#include "user/guest-base.h" - -#ifndef TARGET_TAGGED_ADDRESSES -static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) -{ - return x; -} -#endif - -/* All direct uses of g2h and h2g need to go away for usermode softmmu. */ -static inline void *g2h_untagged(abi_ptr x) -{ - return (void *)((uintptr_t)(x) + guest_base); -} - -static inline void *g2h(CPUState *cs, abi_ptr x) -{ - return g2h_untagged(cpu_untagged_addr(cs, x)); -} - -static inline bool guest_addr_valid_untagged(abi_ulong x) -{ - return x <= GUEST_ADDR_MAX; -} - -static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) -{ - return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; -} - -#define h2g_valid(x) \ - (HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS || \ - (uintptr_t)(x) - guest_base <= GUEST_ADDR_MAX) - -#define h2g_nocheck(x) ({ \ - uintptr_t __ret = (uintptr_t)(x) - guest_base; \ - (abi_ptr)__ret; \ -}) - -#define h2g(x) ({ \ - /* Check if given address fits target address space */ \ - assert(h2g_valid(x)); \ - h2g_nocheck(x); \ -}) - -#endif /* CONFIG_USER_ONLY */ - -uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); -int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr ptr); -int cpu_ldsw_be_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr ptr); -uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr ptr); -int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr); -uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr); -uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr); - -uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); -uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t ra); - -void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stq_be_data(CPUArchState *env, abi_ptr ptr, uint64_t val); -void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val); -void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val); - -void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr ptr, - uint64_t val, uintptr_t ra); -void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr ptr, - uint32_t val, uintptr_t ra); -void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr ptr, - uint64_t val, uintptr_t ra); - -uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); -uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, - int mmu_idx, uintptr_t ra); - -void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, - int mmu_idx, uintptr_t ra); -void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, - int mmu_idx, uintptr_t ra); -void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, - int mmu_idx, uintptr_t ra); - -uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra); - -void cpu_stb_mmu(CPUArchState *env, abi_ptr ptr, uint8_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_stw_mmu(CPUArchState *env, abi_ptr ptr, uint16_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_stl_mmu(CPUArchState *env, abi_ptr ptr, uint32_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_stq_mmu(CPUArchState *env, abi_ptr ptr, uint64_t val, - MemOpIdx oi, uintptr_t ra); -void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, - MemOpIdx oi, uintptr_t ra); - -uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, abi_ptr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, abi_ptr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, abi_ptr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, abi_ptr addr, - uint64_t cmpv, uint64_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, abi_ptr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, abi_ptr addr, - uint32_t cmpv, uint32_t newv, - MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, abi_ptr addr, - uint64_t cmpv, uint64_t newv, - MemOpIdx oi, uintptr_t retaddr); - -#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \ -TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \ - (CPUArchState *env, abi_ptr addr, TYPE val, \ - MemOpIdx oi, uintptr_t retaddr); - -#ifdef CONFIG_ATOMIC64 -#define GEN_ATOMIC_HELPER_ALL(NAME) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, b) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \ - GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \ - GEN_ATOMIC_HELPER(NAME, uint64_t, q_be) -#else -#define GEN_ATOMIC_HELPER_ALL(NAME) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, b) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \ - GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) -#endif - -GEN_ATOMIC_HELPER_ALL(fetch_add) -GEN_ATOMIC_HELPER_ALL(fetch_sub) -GEN_ATOMIC_HELPER_ALL(fetch_and) -GEN_ATOMIC_HELPER_ALL(fetch_or) -GEN_ATOMIC_HELPER_ALL(fetch_xor) -GEN_ATOMIC_HELPER_ALL(fetch_smin) -GEN_ATOMIC_HELPER_ALL(fetch_umin) -GEN_ATOMIC_HELPER_ALL(fetch_smax) -GEN_ATOMIC_HELPER_ALL(fetch_umax) - -GEN_ATOMIC_HELPER_ALL(add_fetch) -GEN_ATOMIC_HELPER_ALL(sub_fetch) -GEN_ATOMIC_HELPER_ALL(and_fetch) -GEN_ATOMIC_HELPER_ALL(or_fetch) -GEN_ATOMIC_HELPER_ALL(xor_fetch) -GEN_ATOMIC_HELPER_ALL(smin_fetch) -GEN_ATOMIC_HELPER_ALL(umin_fetch) -GEN_ATOMIC_HELPER_ALL(smax_fetch) -GEN_ATOMIC_HELPER_ALL(umax_fetch) - -GEN_ATOMIC_HELPER_ALL(xchg) - -#undef GEN_ATOMIC_HELPER_ALL -#undef GEN_ATOMIC_HELPER - -Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, abi_ptr addr, - Int128 cmpv, Int128 newv, - MemOpIdx oi, uintptr_t retaddr); -Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, - Int128 cmpv, Int128 newv, - MemOpIdx oi, uintptr_t retaddr); - -#if TARGET_BIG_ENDIAN -# define cpu_lduw_data cpu_lduw_be_data -# define cpu_ldsw_data cpu_ldsw_be_data -# define cpu_ldl_data cpu_ldl_be_data -# define cpu_ldq_data cpu_ldq_be_data -# define cpu_lduw_data_ra cpu_lduw_be_data_ra -# define cpu_ldsw_data_ra cpu_ldsw_be_data_ra -# define cpu_ldl_data_ra cpu_ldl_be_data_ra -# define cpu_ldq_data_ra cpu_ldq_be_data_ra -# define cpu_lduw_mmuidx_ra cpu_lduw_be_mmuidx_ra -# define cpu_ldsw_mmuidx_ra cpu_ldsw_be_mmuidx_ra -# define cpu_ldl_mmuidx_ra cpu_ldl_be_mmuidx_ra -# define cpu_ldq_mmuidx_ra cpu_ldq_be_mmuidx_ra -# define cpu_stw_data cpu_stw_be_data -# define cpu_stl_data cpu_stl_be_data -# define cpu_stq_data cpu_stq_be_data -# define cpu_stw_data_ra cpu_stw_be_data_ra -# define cpu_stl_data_ra cpu_stl_be_data_ra -# define cpu_stq_data_ra cpu_stq_be_data_ra -# define cpu_stw_mmuidx_ra cpu_stw_be_mmuidx_ra -# define cpu_stl_mmuidx_ra cpu_stl_be_mmuidx_ra -# define cpu_stq_mmuidx_ra cpu_stq_be_mmuidx_ra -#else -# define cpu_lduw_data cpu_lduw_le_data -# define cpu_ldsw_data cpu_ldsw_le_data -# define cpu_ldl_data cpu_ldl_le_data -# define cpu_ldq_data cpu_ldq_le_data -# define cpu_lduw_data_ra cpu_lduw_le_data_ra -# define cpu_ldsw_data_ra cpu_ldsw_le_data_ra -# define cpu_ldl_data_ra cpu_ldl_le_data_ra -# define cpu_ldq_data_ra cpu_ldq_le_data_ra -# define cpu_lduw_mmuidx_ra cpu_lduw_le_mmuidx_ra -# define cpu_ldsw_mmuidx_ra cpu_ldsw_le_mmuidx_ra -# define cpu_ldl_mmuidx_ra cpu_ldl_le_mmuidx_ra -# define cpu_ldq_mmuidx_ra cpu_ldq_le_mmuidx_ra -# define cpu_stw_data cpu_stw_le_data -# define cpu_stl_data cpu_stl_le_data -# define cpu_stq_data cpu_stq_le_data -# define cpu_stw_data_ra cpu_stw_le_data_ra -# define cpu_stl_data_ra cpu_stl_le_data_ra -# define cpu_stq_data_ra cpu_stq_le_data_ra -# define cpu_stw_mmuidx_ra cpu_stw_le_mmuidx_ra -# define cpu_stl_mmuidx_ra cpu_stl_le_mmuidx_ra -# define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra -#endif - -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, - MemOpIdx oi, uintptr_t ra); -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, - MemOpIdx oi, uintptr_t ra); -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, - MemOpIdx oi, uintptr_t ra); -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, - MemOpIdx oi, uintptr_t ra); - -uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); -uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); -uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); -uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr); - -/** - * tlb_vaddr_to_host: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @access_type: 0 for read, 1 for write, 2 for execute - * @mmu_idx: MMU index to use for lookup - * - * Look up the specified guest virtual index in the TCG softmmu TLB. - * If we can translate a host virtual address suitable for direct RAM - * access, without causing a guest exception, then return it. - * Otherwise (TLB entry is for an I/O access, guest software - * TLB fill required, etc) return NULL. - */ -#ifdef CONFIG_USER_ONLY -static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx) -{ - return g2h(env_cpu(env), addr); -} -#else -void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx); -#endif - -/* - * For user-only, helpers that use guest to host address translation - * must protect the actual host memory access by recording 'retaddr' - * for the signal handler. This is required for a race condition in - * which another thread unmaps the page between a probe and the - * actual access. - */ -#ifdef CONFIG_USER_ONLY -extern __thread uintptr_t helper_retaddr; - -static inline void set_helper_retaddr(uintptr_t ra) -{ - helper_retaddr = ra; - /* - * Ensure that this write is visible to the SIGSEGV handler that - * may be invoked due to a subsequent invalid memory operation. - */ - signal_barrier(); -} - -static inline void clear_helper_retaddr(void) -{ - /* - * Ensure that previous memory operations have succeeded before - * removing the data visible to the signal handler. - */ - signal_barrier(); - helper_retaddr = 0; -} -#else -#define set_helper_retaddr(ra) do { } while (0) -#define clear_helper_retaddr() do { } while (0) -#endif - -#endif /* CPU_LDST_H */ diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index ef18642..03ed7e2 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -21,15 +21,266 @@ #define CPUTLB_H #include "exec/cpu-common.h" +#include "exec/hwaddr.h" +#include "exec/memattrs.h" +#include "exec/vaddr.h" -#ifdef CONFIG_TCG - -#if !defined(CONFIG_USER_ONLY) -/* cputlb.c */ +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); #endif -#endif /* CONFIG_TCG */ - +#ifndef CONFIG_USER_ONLY +void tlb_reset_dirty(CPUState *cpu, uintptr_t start, uintptr_t length); +void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); #endif + +/** + * tlb_set_page_full: + * @cpu: CPU context + * @mmu_idx: mmu index of the tlb to modify + * @addr: virtual address of the entry to add + * @full: the details of the tlb entry + * + * Add an entry to @cpu tlb index @mmu_idx. All of the fields of + * @full must be filled, except for xlat_section, and constitute + * the complete description of the translated page. + * + * This is generally called by the target tlb_fill function after + * having performed a successful page table walk to find the physical + * address and attributes for the translation. + * + * At most one entry for a given virtual address is permitted. Only a + * single TARGET_PAGE_SIZE region is mapped; @full->lg_page_size is only + * used by tlb_flush_page. + */ +void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr, + CPUTLBEntryFull *full); + +/** + * tlb_set_page_with_attrs: + * @cpu: CPU to add this TLB entry for + * @addr: virtual address of page to add entry for + * @paddr: physical address of the page + * @attrs: memory transaction attributes + * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits) + * @mmu_idx: MMU index to insert TLB entry for + * @size: size of the page in bytes + * + * Add an entry to this CPU's TLB (a mapping from virtual address + * @addr to physical address @paddr) with the specified memory + * transaction attributes. This is generally called by the target CPU + * specific code after it has been called through the tlb_fill() + * entry point and performed a successful page table walk to find + * the physical address and attributes for the virtual address + * which provoked the TLB miss. + * + * At most one entry for a given virtual address is permitted. Only a + * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only + * used by tlb_flush_page. + */ +void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr, + hwaddr paddr, MemTxAttrs attrs, + int prot, int mmu_idx, vaddr size); + +/** + * tlb_set_page: + * + * This function is equivalent to calling tlb_set_page_with_attrs() + * with an @attrs argument of MEMTXATTRS_UNSPECIFIED. It's provided + * as a convenience for CPUs which don't use memory transaction attributes. + */ +void tlb_set_page(CPUState *cpu, vaddr addr, + hwaddr paddr, int prot, + int mmu_idx, vaddr size); + +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) +/** + * tlb_flush_page: + * @cpu: CPU whose TLB should be flushed + * @addr: virtual address of page to be flushed + * + * Flush one page from the TLB of the specified CPU, for all + * MMU indexes. + */ +void tlb_flush_page(CPUState *cpu, vaddr addr); + +/** + * tlb_flush_page_all_cpus_synced: + * @cpu: src CPU of the flush + * @addr: virtual address of page to be flushed + * + * Flush one page from the TLB of all CPUs, for all + * MMU indexes. + * + * When this function returns, no CPUs will subsequently perform + * translations using the flushed TLBs. + */ +void tlb_flush_page_all_cpus_synced(CPUState *src, vaddr addr); + +/** + * tlb_flush: + * @cpu: CPU whose TLB should be flushed + * + * Flush the entire TLB for the specified CPU. Most CPU architectures + * allow the implementation to drop entries from the TLB at any time + * so this is generally safe. If more selective flushing is required + * use one of the other functions for efficiency. + */ +void tlb_flush(CPUState *cpu); + +/** + * tlb_flush_all_cpus_synced: + * @cpu: src CPU of the flush + * + * Flush the entire TLB for all CPUs, for all MMU indexes. + * + * When this function returns, no CPUs will subsequently perform + * translations using the flushed TLBs. + */ +void tlb_flush_all_cpus_synced(CPUState *src_cpu); + +/** + * tlb_flush_page_by_mmuidx: + * @cpu: CPU whose TLB should be flushed + * @addr: virtual address of page to be flushed + * @idxmap: bitmap of MMU indexes to flush + * + * Flush one page from the TLB of the specified CPU, for the specified + * MMU indexes. + */ +void tlb_flush_page_by_mmuidx(CPUState *cpu, vaddr addr, + uint16_t idxmap); + +/** + * tlb_flush_page_by_mmuidx_all_cpus_synced: + * @cpu: Originating CPU of the flush + * @addr: virtual address of page to be flushed + * @idxmap: bitmap of MMU indexes to flush + * + * Flush one page from the TLB of all CPUs, for the specified + * MMU indexes. + * + * When this function returns, no CPUs will subsequently perform + * translations using the flushed TLBs. + */ +void tlb_flush_page_by_mmuidx_all_cpus_synced(CPUState *cpu, vaddr addr, + uint16_t idxmap); + +/** + * tlb_flush_by_mmuidx: + * @cpu: CPU whose TLB should be flushed + * @wait: If true ensure synchronisation by exiting the cpu_loop + * @idxmap: bitmap of MMU indexes to flush + * + * Flush all entries from the TLB of the specified CPU, for the specified + * MMU indexes. + */ +void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t idxmap); + +/** + * tlb_flush_by_mmuidx_all_cpus_synced: + * @cpu: Originating CPU of the flush + * @idxmap: bitmap of MMU indexes to flush + * + * Flush all entries from the TLB of all CPUs, for the specified + * MMU indexes. + * + * When this function returns, no CPUs will subsequently perform + * translations using the flushed TLBs. + */ +void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, uint16_t idxmap); + +/** + * tlb_flush_page_bits_by_mmuidx + * @cpu: CPU whose TLB should be flushed + * @addr: virtual address of page to be flushed + * @idxmap: bitmap of mmu indexes to flush + * @bits: number of significant bits in address + * + * Similar to tlb_flush_page_mask, but with a bitmap of indexes. + */ +void tlb_flush_page_bits_by_mmuidx(CPUState *cpu, vaddr addr, + uint16_t idxmap, unsigned bits); + +/* Similarly, with broadcast and syncing. */ +void tlb_flush_page_bits_by_mmuidx_all_cpus_synced(CPUState *cpu, vaddr addr, + uint16_t idxmap, + unsigned bits); + +/** + * tlb_flush_range_by_mmuidx + * @cpu: CPU whose TLB should be flushed + * @addr: virtual address of the start of the range to be flushed + * @len: length of range to be flushed + * @idxmap: bitmap of mmu indexes to flush + * @bits: number of significant bits in address + * + * For each mmuidx in @idxmap, flush all pages within [@addr,@addr+@len), + * comparing only the low @bits worth of each virtual page. + */ +void tlb_flush_range_by_mmuidx(CPUState *cpu, vaddr addr, + vaddr len, uint16_t idxmap, + unsigned bits); + +/* Similarly, with broadcast and syncing. */ +void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *cpu, + vaddr addr, + vaddr len, + uint16_t idxmap, + unsigned bits); +#else +static inline void tlb_flush_page(CPUState *cpu, vaddr addr) +{ +} +static inline void tlb_flush_page_all_cpus_synced(CPUState *src, vaddr addr) +{ +} +static inline void tlb_flush(CPUState *cpu) +{ +} +static inline void tlb_flush_all_cpus_synced(CPUState *src_cpu) +{ +} +static inline void tlb_flush_page_by_mmuidx(CPUState *cpu, + vaddr addr, uint16_t idxmap) +{ +} + +static inline void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t idxmap) +{ +} +static inline void tlb_flush_page_by_mmuidx_all_cpus_synced(CPUState *cpu, + vaddr addr, + uint16_t idxmap) +{ +} +static inline void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, + uint16_t idxmap) +{ +} +static inline void tlb_flush_page_bits_by_mmuidx(CPUState *cpu, + vaddr addr, + uint16_t idxmap, + unsigned bits) +{ +} +static inline void +tlb_flush_page_bits_by_mmuidx_all_cpus_synced(CPUState *cpu, vaddr addr, + uint16_t idxmap, unsigned bits) +{ +} +static inline void tlb_flush_range_by_mmuidx(CPUState *cpu, vaddr addr, + vaddr len, uint16_t idxmap, + unsigned bits) +{ +} +static inline void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *cpu, + vaddr addr, + vaddr len, + uint16_t idxmap, + unsigned bits) +{ +} +#endif /* CONFIG_TCG && !CONFIG_USER_ONLY */ +#endif /* CPUTLB_H */ diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h deleted file mode 100644 index 72240ef..0000000 --- a/include/exec/exec-all.h +++ /dev/null @@ -1,604 +0,0 @@ -/* - * internal execution defines for qemu - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef EXEC_ALL_H -#define EXEC_ALL_H - -#include "cpu.h" -#if defined(CONFIG_USER_ONLY) -#include "exec/abi_ptr.h" -#include "exec/cpu_ldst.h" -#endif -#include "exec/mmu-access-type.h" -#include "exec/translation-block.h" -#include "qemu/clang-tsa.h" - -/** - * cpu_loop_exit_requested: - * @cpu: The CPU state to be tested - * - * Indicate if somebody asked for a return of the CPU to the main loop - * (e.g., via cpu_exit() or cpu_interrupt()). - * - * This is helpful for architectures that support interruptible - * instructions. After writing back all state to registers/memory, this - * call can be used to check if it makes sense to return to the main loop - * or to continue executing the interruptible instruction. - */ -static inline bool cpu_loop_exit_requested(CPUState *cpu) -{ - return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; -} - -#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) -/* cputlb.c */ -/** - * tlb_init - initialize a CPU's TLB - * @cpu: CPU whose TLB should be initialized - */ -void tlb_init(CPUState *cpu); -/** - * tlb_destroy - destroy a CPU's TLB - * @cpu: CPU whose TLB should be destroyed - */ -void tlb_destroy(CPUState *cpu); -/** - * tlb_flush_page: - * @cpu: CPU whose TLB should be flushed - * @addr: virtual address of page to be flushed - * - * Flush one page from the TLB of the specified CPU, for all - * MMU indexes. - */ -void tlb_flush_page(CPUState *cpu, vaddr addr); -/** - * tlb_flush_page_all_cpus_synced: - * @cpu: src CPU of the flush - * @addr: virtual address of page to be flushed - * - * Flush one page from the TLB of all CPUs, for all - * MMU indexes. - * - * When this function returns, no CPUs will subsequently perform - * translations using the flushed TLBs. - */ -void tlb_flush_page_all_cpus_synced(CPUState *src, vaddr addr); -/** - * tlb_flush: - * @cpu: CPU whose TLB should be flushed - * - * Flush the entire TLB for the specified CPU. Most CPU architectures - * allow the implementation to drop entries from the TLB at any time - * so this is generally safe. If more selective flushing is required - * use one of the other functions for efficiency. - */ -void tlb_flush(CPUState *cpu); -/** - * tlb_flush_all_cpus_synced: - * @cpu: src CPU of the flush - * - * Flush the entire TLB for all CPUs, for all MMU indexes. - * - * When this function returns, no CPUs will subsequently perform - * translations using the flushed TLBs. - */ -void tlb_flush_all_cpus_synced(CPUState *src_cpu); -/** - * tlb_flush_page_by_mmuidx: - * @cpu: CPU whose TLB should be flushed - * @addr: virtual address of page to be flushed - * @idxmap: bitmap of MMU indexes to flush - * - * Flush one page from the TLB of the specified CPU, for the specified - * MMU indexes. - */ -void tlb_flush_page_by_mmuidx(CPUState *cpu, vaddr addr, - uint16_t idxmap); -/** - * tlb_flush_page_by_mmuidx_all_cpus_synced: - * @cpu: Originating CPU of the flush - * @addr: virtual address of page to be flushed - * @idxmap: bitmap of MMU indexes to flush - * - * Flush one page from the TLB of all CPUs, for the specified - * MMU indexes. - * - * When this function returns, no CPUs will subsequently perform - * translations using the flushed TLBs. - */ -void tlb_flush_page_by_mmuidx_all_cpus_synced(CPUState *cpu, vaddr addr, - uint16_t idxmap); -/** - * tlb_flush_by_mmuidx: - * @cpu: CPU whose TLB should be flushed - * @wait: If true ensure synchronisation by exiting the cpu_loop - * @idxmap: bitmap of MMU indexes to flush - * - * Flush all entries from the TLB of the specified CPU, for the specified - * MMU indexes. - */ -void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t idxmap); -/** - * tlb_flush_by_mmuidx_all_cpus_synced: - * @cpu: Originating CPU of the flush - * @idxmap: bitmap of MMU indexes to flush - * - * Flush all entries from the TLB of all CPUs, for the specified - * MMU indexes. - * - * When this function returns, no CPUs will subsequently perform - * translations using the flushed TLBs. - */ -void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, uint16_t idxmap); - -/** - * tlb_flush_page_bits_by_mmuidx - * @cpu: CPU whose TLB should be flushed - * @addr: virtual address of page to be flushed - * @idxmap: bitmap of mmu indexes to flush - * @bits: number of significant bits in address - * - * Similar to tlb_flush_page_mask, but with a bitmap of indexes. - */ -void tlb_flush_page_bits_by_mmuidx(CPUState *cpu, vaddr addr, - uint16_t idxmap, unsigned bits); - -/* Similarly, with broadcast and syncing. */ -void tlb_flush_page_bits_by_mmuidx_all_cpus_synced - (CPUState *cpu, vaddr addr, uint16_t idxmap, unsigned bits); - -/** - * tlb_flush_range_by_mmuidx - * @cpu: CPU whose TLB should be flushed - * @addr: virtual address of the start of the range to be flushed - * @len: length of range to be flushed - * @idxmap: bitmap of mmu indexes to flush - * @bits: number of significant bits in address - * - * For each mmuidx in @idxmap, flush all pages within [@addr,@addr+@len), - * comparing only the low @bits worth of each virtual page. - */ -void tlb_flush_range_by_mmuidx(CPUState *cpu, vaddr addr, - vaddr len, uint16_t idxmap, - unsigned bits); - -/* Similarly, with broadcast and syncing. */ -void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *cpu, - vaddr addr, - vaddr len, - uint16_t idxmap, - unsigned bits); - -/** - * tlb_set_page_full: - * @cpu: CPU context - * @mmu_idx: mmu index of the tlb to modify - * @addr: virtual address of the entry to add - * @full: the details of the tlb entry - * - * Add an entry to @cpu tlb index @mmu_idx. All of the fields of - * @full must be filled, except for xlat_section, and constitute - * the complete description of the translated page. - * - * This is generally called by the target tlb_fill function after - * having performed a successful page table walk to find the physical - * address and attributes for the translation. - * - * At most one entry for a given virtual address is permitted. Only a - * single TARGET_PAGE_SIZE region is mapped; @full->lg_page_size is only - * used by tlb_flush_page. - */ -void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr, - CPUTLBEntryFull *full); - -/** - * tlb_set_page_with_attrs: - * @cpu: CPU to add this TLB entry for - * @addr: virtual address of page to add entry for - * @paddr: physical address of the page - * @attrs: memory transaction attributes - * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits) - * @mmu_idx: MMU index to insert TLB entry for - * @size: size of the page in bytes - * - * Add an entry to this CPU's TLB (a mapping from virtual address - * @addr to physical address @paddr) with the specified memory - * transaction attributes. This is generally called by the target CPU - * specific code after it has been called through the tlb_fill() - * entry point and performed a successful page table walk to find - * the physical address and attributes for the virtual address - * which provoked the TLB miss. - * - * At most one entry for a given virtual address is permitted. Only a - * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only - * used by tlb_flush_page. - */ -void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr, - hwaddr paddr, MemTxAttrs attrs, - int prot, int mmu_idx, vaddr size); -/* tlb_set_page: - * - * This function is equivalent to calling tlb_set_page_with_attrs() - * with an @attrs argument of MEMTXATTRS_UNSPECIFIED. It's provided - * as a convenience for CPUs which don't use memory transaction attributes. - */ -void tlb_set_page(CPUState *cpu, vaddr addr, - hwaddr paddr, int prot, - int mmu_idx, vaddr size); -#else -static inline void tlb_init(CPUState *cpu) -{ -} -static inline void tlb_destroy(CPUState *cpu) -{ -} -static inline void tlb_flush_page(CPUState *cpu, vaddr addr) -{ -} -static inline void tlb_flush_page_all_cpus_synced(CPUState *src, vaddr addr) -{ -} -static inline void tlb_flush(CPUState *cpu) -{ -} -static inline void tlb_flush_all_cpus_synced(CPUState *src_cpu) -{ -} -static inline void tlb_flush_page_by_mmuidx(CPUState *cpu, - vaddr addr, uint16_t idxmap) -{ -} - -static inline void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t idxmap) -{ -} -static inline void tlb_flush_page_by_mmuidx_all_cpus_synced(CPUState *cpu, - vaddr addr, - uint16_t idxmap) -{ -} -static inline void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, - uint16_t idxmap) -{ -} -static inline void tlb_flush_page_bits_by_mmuidx(CPUState *cpu, - vaddr addr, - uint16_t idxmap, - unsigned bits) -{ -} -static inline void -tlb_flush_page_bits_by_mmuidx_all_cpus_synced(CPUState *cpu, vaddr addr, - uint16_t idxmap, unsigned bits) -{ -} -static inline void tlb_flush_range_by_mmuidx(CPUState *cpu, vaddr addr, - vaddr len, uint16_t idxmap, - unsigned bits) -{ -} -static inline void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *cpu, - vaddr addr, - vaddr len, - uint16_t idxmap, - unsigned bits) -{ -} -#endif - -#if defined(CONFIG_TCG) - -/** - * probe_access: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @size: size of the access - * @access_type: read, write or execute permission - * @mmu_idx: MMU index to use for lookup - * @retaddr: return address for unwinding - * - * Look up the guest virtual address @addr. Raise an exception if the - * page does not satisfy @access_type. Raise an exception if the - * access (@addr, @size) hits a watchpoint. For writes, mark a clean - * page as dirty. - * - * Finally, return the host address for a page that is backed by RAM, - * or NULL if the page requires I/O. - */ -void *probe_access(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, uintptr_t retaddr); - -static inline void *probe_write(CPUArchState *env, vaddr addr, int size, - int mmu_idx, uintptr_t retaddr) -{ - return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr); -} - -static inline void *probe_read(CPUArchState *env, vaddr addr, int size, - int mmu_idx, uintptr_t retaddr) -{ - return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); -} - -/** - * probe_access_flags: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @size: size of the access - * @access_type: read, write or execute permission - * @mmu_idx: MMU index to use for lookup - * @nonfault: suppress the fault - * @phost: return value for host address - * @retaddr: return address for unwinding - * - * Similar to probe_access, loosely returning the TLB_FLAGS_MASK for - * the page, and storing the host address for RAM in @phost. - * - * If @nonfault is set, do not raise an exception but return TLB_INVALID_MASK. - * Do not handle watchpoints, but include TLB_WATCHPOINT in the returned flags. - * Do handle clean pages, so exclude TLB_NOTDIRY from the returned flags. - * For simplicity, all "mmio-like" flags are folded to TLB_MMIO. - */ -int probe_access_flags(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, - bool nonfault, void **phost, uintptr_t retaddr); - -#ifndef CONFIG_USER_ONLY - -/** - * probe_access_full: - * Like probe_access_flags, except also return into @pfull. - * - * The CPUTLBEntryFull structure returned via @pfull is transient - * and must be consumed or copied immediately, before any further - * access or changes to TLB @mmu_idx. - */ -int probe_access_full(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, - bool nonfault, void **phost, - CPUTLBEntryFull **pfull, uintptr_t retaddr); - -/** - * probe_access_mmu() - Like probe_access_full except cannot fault and - * doesn't trigger instrumentation. - * - * @env: CPUArchState - * @vaddr: virtual address to probe - * @size: size of the probe - * @access_type: read, write or execute permission - * @mmu_idx: softmmu index - * @phost: ptr to return value host address or NULL - * @pfull: ptr to return value CPUTLBEntryFull structure or NULL - * - * The CPUTLBEntryFull structure returned via @pfull is transient - * and must be consumed or copied immediately, before any further - * access or changes to TLB @mmu_idx. - * - * Returns: TLB flags as per probe_access_flags() - */ -int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, - void **phost, CPUTLBEntryFull **pfull); - -#endif /* !CONFIG_USER_ONLY */ -#endif /* CONFIG_TCG */ - -static inline tb_page_addr_t tb_page_addr0(const TranslationBlock *tb) -{ -#ifdef CONFIG_USER_ONLY - return tb->itree.start; -#else - return tb->page_addr[0]; -#endif -} - -static inline tb_page_addr_t tb_page_addr1(const TranslationBlock *tb) -{ -#ifdef CONFIG_USER_ONLY - tb_page_addr_t next = tb->itree.last & TARGET_PAGE_MASK; - return next == (tb->itree.start & TARGET_PAGE_MASK) ? -1 : next; -#else - return tb->page_addr[1]; -#endif -} - -static inline void tb_set_page_addr0(TranslationBlock *tb, - tb_page_addr_t addr) -{ -#ifdef CONFIG_USER_ONLY - tb->itree.start = addr; - /* - * To begin, we record an interval of one byte. When the translation - * loop encounters a second page, the interval will be extended to - * include the first byte of the second page, which is sufficient to - * allow tb_page_addr1() above to work properly. The final corrected - * interval will be set by tb_page_add() from tb->size before the - * node is added to the interval tree. - */ - tb->itree.last = addr; -#else - tb->page_addr[0] = addr; -#endif -} - -static inline void tb_set_page_addr1(TranslationBlock *tb, - tb_page_addr_t addr) -{ -#ifdef CONFIG_USER_ONLY - /* Extend the interval to the first byte of the second page. See above. */ - tb->itree.last = addr; -#else - tb->page_addr[1] = addr; -#endif -} - -/* TranslationBlock invalidate API */ -void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); -void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last); -void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr); - -/* GETPC is the true target of the return instruction that we'll execute. */ -#if defined(CONFIG_TCG_INTERPRETER) -extern __thread uintptr_t tci_tb_ptr; -# define GETPC() tci_tb_ptr -#else -# define GETPC() \ - ((uintptr_t)__builtin_extract_return_addr(__builtin_return_address(0))) -#endif - -/* The true return address will often point to a host insn that is part of - the next translated guest insn. Adjust the address backward to point to - the middle of the call insn. Subtracting one would do the job except for - several compressed mode architectures (arm, mips) which set the low bit - to indicate the compressed mode; subtracting two works around that. It - is also the case that there are no host isas that contain a call insn - smaller than 4 bytes, so we don't worry about special-casing this. */ -#define GETPC_ADJ 2 - -#if !defined(CONFIG_USER_ONLY) - -/** - * iotlb_to_section: - * @cpu: CPU performing the access - * @index: TCG CPU IOTLB entry - * - * Given a TCG CPU IOTLB entry, return the MemoryRegionSection that - * it refers to. @index will have been initially created and returned - * by memory_region_section_get_iotlb(). - */ -struct MemoryRegionSection *iotlb_to_section(CPUState *cpu, - hwaddr index, MemTxAttrs attrs); -#endif - -/** - * get_page_addr_code_hostp() - * @env: CPUArchState - * @addr: guest virtual address of guest code - * - * See get_page_addr_code() (full-system version) for documentation on the - * return value. - * - * Sets *@hostp (when @hostp is non-NULL) as follows. - * If the return value is -1, sets *@hostp to NULL. Otherwise, sets *@hostp - * to the host address where @addr's content is kept. - * - * Note: this function can trigger an exception. - */ -tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr, - void **hostp); - -/** - * get_page_addr_code() - * @env: CPUArchState - * @addr: guest virtual address of guest code - * - * If we cannot translate and execute from the entire RAM page, or if - * the region is not backed by RAM, returns -1. Otherwise, returns the - * ram_addr_t corresponding to the guest code at @addr. - * - * Note: this function can trigger an exception. - */ -static inline tb_page_addr_t get_page_addr_code(CPUArchState *env, - vaddr addr) -{ - return get_page_addr_code_hostp(env, addr, NULL); -} - -#if defined(CONFIG_USER_ONLY) -void TSA_NO_TSA mmap_lock(void); -void TSA_NO_TSA mmap_unlock(void); -bool have_mmap_lock(void); - -static inline void mmap_unlock_guard(void *unused) -{ - mmap_unlock(); -} - -#define WITH_MMAP_LOCK_GUARD() \ - for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \ - = (mmap_lock(), 0); _mmap_lock_iter == 0; _mmap_lock_iter = 1) - -/** - * adjust_signal_pc: - * @pc: raw pc from the host signal ucontext_t. - * @is_write: host memory operation was write, or read-modify-write. - * - * Alter @pc as required for unwinding. Return the type of the - * guest memory access -- host reads may be for guest execution. - */ -MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); - -/** - * handle_sigsegv_accerr_write: - * @cpu: the cpu context - * @old_set: the sigset_t from the signal ucontext_t - * @host_pc: the host pc, adjusted for the signal - * @host_addr: the host address of the fault - * - * Return true if the write fault has been handled, and should be re-tried. - */ -bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, - uintptr_t host_pc, abi_ptr guest_addr); - -/** - * cpu_loop_exit_sigsegv: - * @cpu: the cpu context - * @addr: the guest address of the fault - * @access_type: access was read/write/execute - * @maperr: true for invalid page, false for permission fault - * @ra: host pc for unwinding - * - * Use the TCGCPUOps hook to record cpu state, do guest operating system - * specific things to raise SIGSEGV, and jump to the main cpu loop. - */ -G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr, - MMUAccessType access_type, - bool maperr, uintptr_t ra); - -/** - * cpu_loop_exit_sigbus: - * @cpu: the cpu context - * @addr: the guest address of the alignment fault - * @access_type: access was read/write/execute - * @ra: host pc for unwinding - * - * Use the TCGCPUOps hook to record cpu state, do guest operating system - * specific things to raise SIGBUS, and jump to the main cpu loop. - */ -G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr, - MMUAccessType access_type, - uintptr_t ra); - -#else -static inline void mmap_lock(void) {} -static inline void mmap_unlock(void) {} -#define WITH_MMAP_LOCK_GUARD() - -void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); -void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); - -MemoryRegionSection * -address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr, - hwaddr *xlat, hwaddr *plen, - MemTxAttrs attrs, int *prot); -hwaddr memory_region_section_get_iotlb(CPUState *cpu, - MemoryRegionSection *section); -#endif - -#endif diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index d73f424..a16c005 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -49,12 +49,18 @@ void gdb_unregister_coprocessor_all(CPUState *cpu); /** * gdbserver_start: start the gdb server * @port_or_device: connection spec for gdb + * @errp: error handle * * For CONFIG_USER this is either a tcp port or a path to a fifo. For * system emulation you can use a full chardev spec for your gdbserver * port. + * + * The error handle should be either &error_fatal (for start-up) or + * &error_warn (for QMP/HMP initiated sessions). + * + * Returns true when server successfully started. */ -int gdbserver_start(const char *port_or_device); +bool gdbserver_start(const char *port_or_device, Error **errp); /** * gdb_feature_builder_init() - Initialize GDBFeatureBuilder. @@ -119,6 +125,20 @@ const GDBFeature *gdb_find_static_feature(const char *xmlname); int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); /** + * gdb_write_register() - Write a register associated with a CPU. + * @cpu: The CPU associated with the register. + * @buf: The buffer that the register contents will be set to. + * @reg: The register's number returned by gdb_find_feature_register(). + * + * The size of @buf must be at least the size of the register being + * written. + * + * Return: The number of written bytes, or 0 if an error occurred (for + * example, an unknown register was provided). + */ +int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg); + +/** * typedef GDBRegDesc - a register description from gdbstub */ typedef struct { diff --git a/include/exec/helper-head.h.inc b/include/exec/helper-head.h.inc index 5ef467a..5b248fd 100644 --- a/include/exec/helper-head.h.inc +++ b/include/exec/helper-head.h.inc @@ -23,6 +23,7 @@ #define dh_alias_ptr ptr #define dh_alias_cptr ptr #define dh_alias_env ptr +#define dh_alias_fpst ptr #define dh_alias_void void #define dh_alias_noreturn noreturn #define dh_alias(t) glue(dh_alias_, t) @@ -39,6 +40,7 @@ #define dh_ctype_ptr void * #define dh_ctype_cptr const void * #define dh_ctype_env CPUArchState * +#define dh_ctype_fpst float_status * #define dh_ctype_void void #define dh_ctype_noreturn G_NORETURN void #define dh_ctype(t) dh_ctype_##t @@ -56,6 +58,17 @@ # define dh_ctype_tl target_ulong #endif /* COMPILING_PER_TARGET */ +#if __SIZEOF_POINTER__ == 4 +# define dh_alias_vaddr i32 +# define dh_typecode_vaddr dh_typecode_i32 +#elif __SIZEOF_POINTER__ == 8 +# define dh_alias_vaddr i64 +# define dh_typecode_vaddr dh_typecode_i64 +#else +# error "sizeof pointer is different from {4,8}" +#endif /* __SIZEOF_POINTER__ */ +# define dh_ctype_vaddr uintptr_t + /* We can't use glue() here because it falls foul of C preprocessor recursive expansion rules. */ #define dh_retvar_decl0_void void @@ -96,6 +109,7 @@ #define dh_typecode_f64 dh_typecode_i64 #define dh_typecode_cptr dh_typecode_ptr #define dh_typecode_env dh_typecode_ptr +#define dh_typecode_fpst dh_typecode_ptr #define dh_typecode(t) dh_typecode_##t #define dh_callflag_i32 0 diff --git a/include/exec/helper-proto-common.h b/include/exec/helper-proto-common.h index 16782ef..76e6c25 100644 --- a/include/exec/helper-proto-common.h +++ b/include/exec/helper-proto-common.h @@ -13,4 +13,6 @@ #include "exec/helper-proto.h.inc" #undef HELPER_H +#include "accel/tcg/getpc.h" + #endif /* HELPER_PROTO_COMMON_H */ diff --git a/include/exec/icount.h b/include/exec/icount.h new file mode 100644 index 0000000..7a26b40 --- /dev/null +++ b/include/exec/icount.h @@ -0,0 +1,76 @@ +/* + * icount - Instruction Counter API + * CPU timers state API + * + * Copyright 2020 SUSE LLC + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef EXEC_ICOUNT_H +#define EXEC_ICOUNT_H + +/** + * ICountMode: icount enablement state: + * + * @ICOUNT_DISABLED: Disabled - Do not count executed instructions. + * @ICOUNT_PRECISE: Enabled - Fixed conversion of insn to ns via "shift" option + * @ICOUNT_ADAPTATIVE: Enabled - Runtime adaptive algorithm to compute shift + */ +typedef enum { + ICOUNT_DISABLED = 0, + ICOUNT_PRECISE, + ICOUNT_ADAPTATIVE, +} ICountMode; + +#ifdef CONFIG_TCG +extern ICountMode use_icount; +#define icount_enabled() (use_icount) +#else +#define icount_enabled() ICOUNT_DISABLED +#endif + +/* Protect the CONFIG_USER_ONLY test vs poisoning. */ +#if defined(COMPILING_PER_TARGET) || defined(COMPILING_SYSTEM_VS_USER) +# ifdef CONFIG_USER_ONLY +# undef icount_enabled +# define icount_enabled() ICOUNT_DISABLED +# endif +#endif + +/* + * Update the icount with the executed instructions. Called by + * cpus-tcg vCPU thread so the main-loop can see time has moved forward. + */ +void icount_update(CPUState *cpu); + +/* get raw icount value */ +int64_t icount_get_raw(void); + +/* return the virtual CPU time in ns, based on the instruction counter. */ +int64_t icount_get(void); +/* + * convert an instruction counter value to ns, based on the icount shift. + * This shift is set as a fixed value with the icount "shift" option + * (precise mode), or it is constantly approximated and corrected at + * runtime in adaptive mode. + */ +int64_t icount_to_ns(int64_t icount); + +/** + * icount_configure: configure the icount options, including "shift" + * @opts: Options to parse + * @errp: pointer to a NULL-initialized error object + * + * Return: true on success, else false setting @errp with error + */ +bool icount_configure(QemuOpts *opts, Error **errp); + +/* used by tcg vcpu thread to calc icount budget */ +int64_t icount_round(int64_t count); + +/* if the CPUs are idle, start accounting real time to virtual clock. */ +void icount_start_warp_timer(void); +void icount_account_warp_timer(void); +void icount_notify_exit(void); + +#endif /* EXEC_ICOUNT_H */ diff --git a/include/exec/ioport.h b/include/exec/ioport.h deleted file mode 100644 index 4397f12..0000000 --- a/include/exec/ioport.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * defines ioport related functions - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ - -/************************************************************************** - * IO ports API - */ - -#ifndef IOPORT_H -#define IOPORT_H - -#include "exec/memory.h" - -#define MAX_IOPORTS (64 * 1024) -#define IOPORTS_MASK (MAX_IOPORTS - 1) - -typedef struct MemoryRegionPortio { - uint32_t offset; - uint32_t len; - unsigned size; - uint32_t (*read)(void *opaque, uint32_t address); - void (*write)(void *opaque, uint32_t address, uint32_t data); -} MemoryRegionPortio; - -#define PORTIO_END_OF_LIST() { } - -#ifndef CONFIG_USER_ONLY -extern const MemoryRegionOps unassigned_io_ops; -#endif - -void cpu_outb(uint32_t addr, uint8_t val); -void cpu_outw(uint32_t addr, uint16_t val); -void cpu_outl(uint32_t addr, uint32_t val); -uint8_t cpu_inb(uint32_t addr); -uint16_t cpu_inw(uint32_t addr); -uint32_t cpu_inl(uint32_t addr); - -typedef struct PortioList { - const struct MemoryRegionPortio *ports; - Object *owner; - struct MemoryRegion *address_space; - uint32_t addr; - unsigned nr; - struct MemoryRegion **regions; - void *opaque; - const char *name; - bool flush_coalesced_mmio; -} PortioList; - -void portio_list_init(PortioList *piolist, Object *owner, - const struct MemoryRegionPortio *callbacks, - void *opaque, const char *name); -void portio_list_set_flush_coalesced(PortioList *piolist); -void portio_list_destroy(PortioList *piolist); -void portio_list_add(PortioList *piolist, - struct MemoryRegion *address_space, - uint32_t addr); -void portio_list_del(PortioList *piolist); -void portio_list_set_enabled(PortioList *piolist, bool enabled); -void portio_list_set_address(PortioList *piolist, uint32_t addr); - -#endif /* IOPORT_H */ diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h index 14cdd8d..8db1d30 100644 --- a/include/exec/memattrs.h +++ b/include/exec/memattrs.h @@ -23,12 +23,6 @@ * different semantics. */ typedef struct MemTxAttrs { - /* Bus masters which don't specify any attributes will get this - * (via the MEMTXATTRS_UNSPECIFIED constant), so that we can - * distinguish "all attributes deliberately clear" from - * "didn't specify" if necessary. - */ - unsigned int unspecified:1; /* * ARM/AMBA: TrustZone Secure access * x86: System Management Mode access @@ -50,16 +44,37 @@ typedef struct MemTxAttrs { * (see MEMTX_ACCESS_ERROR). */ unsigned int memory:1; + /* Debug access that can even write to ROM. */ + unsigned int debug:1; /* Requester ID (for MSI for example) */ unsigned int requester_id:16; + + /* + * PID (PCI PASID) support: Limited to 8 bits process identifier. + */ + unsigned int pid:8; + + /* + * Bus masters which don't specify any attributes will get this + * (via the MEMTXATTRS_UNSPECIFIED constant), so that we can + * distinguish "all attributes deliberately clear" from + * "didn't specify" if necessary. "debug" can be set alongside + * "unspecified". + */ + bool unspecified; + + uint8_t _reserved1; + uint16_t _reserved2; } MemTxAttrs; +QEMU_BUILD_BUG_ON(sizeof(MemTxAttrs) > 8); + /* Bus masters which don't specify any attributes will get this, * which has all attribute bits clear except the topmost one * (so that we can distinguish "all attributes deliberately clear" * from "didn't specify" if necessary). */ -#define MEMTXATTRS_UNSPECIFIED ((MemTxAttrs) { .unspecified = 1 }) +#define MEMTXATTRS_UNSPECIFIED ((MemTxAttrs) { .unspecified = true }) /* New-style MMIO accessors can indicate that the transaction failed. * A zero (MEMTX_OK) response means success; anything else is a failure diff --git a/include/exec/memop.h b/include/exec/memop.h index f881fe7..cf7da33 100644 --- a/include/exec/memop.h +++ b/include/exec/memop.h @@ -91,8 +91,12 @@ typedef enum MemOp { * Depending on alignment, one or both will be single-copy atomic. * This is the atomicity e.g. of Arm FEAT_LSE2 LDP. * MO_ATOM_SUBALIGN: the operation is single-copy atomic by parts - * by the alignment. E.g. if the address is 0 mod 4, then each - * 4-byte subobject is single-copy atomic. + * by the alignment. E.g. if an 8-byte value is accessed at an + * address which is 0 mod 8, then the whole 8-byte access is + * single-copy atomic; otherwise, if it is accessed at 0 mod 4 + * then each 4-byte subobject is single-copy atomic; otherwise + * if it is accessed at 0 mod 2 then the four 2-byte subobjects + * are single-copy atomic. * This is the atomicity e.g. of IBM Power. * MO_ATOM_NONE: the operation has no atomicity requirements. * @@ -158,16 +162,57 @@ static inline unsigned memop_size(MemOp op) static inline MemOp size_memop(unsigned size) { #ifdef CONFIG_DEBUG_TCG - /* Power of 2 up to 8. */ - assert((size & (size - 1)) == 0 && size >= 1 && size <= 8); + /* Power of 2 up to 1024 */ + assert(is_power_of_2(size) && size >= 1 && size <= (1 << MO_SIZE)); #endif return (MemOp)ctz32(size); } -/* Big endianness from MemOp. */ -static inline bool memop_big_endian(MemOp op) +/** + * memop_alignment_bits: + * @memop: MemOp value + * + * Extract the alignment size from the memop. + */ +static inline unsigned memop_alignment_bits(MemOp memop) +{ + unsigned a = memop & MO_AMASK; + + if (a == MO_UNALN) { + /* No alignment required. */ + a = 0; + } else if (a == MO_ALIGN) { + /* A natural alignment requirement. */ + a = memop & MO_SIZE; + } else { + /* A specific alignment requirement. */ + a = a >> MO_ASHIFT; + } + return a; +} + +/* + * memop_atomicity_bits: + * @memop: MemOp value + * + * Extract the atomicity size from the memop. + */ +static inline unsigned memop_atomicity_bits(MemOp memop) { - return (op & MO_BSWAP) == MO_BE; + unsigned size = memop & MO_SIZE; + + switch (memop & MO_ATOM_MASK) { + case MO_ATOM_NONE: + size = MO_8; + break; + case MO_ATOM_IFALIGN_PAIR: + case MO_ATOM_WITHIN16_PAIR: + size = size ? size - 1 : 0; + break; + default: + break; + } + return size; } #endif diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h deleted file mode 100644 index 100c123..0000000 --- a/include/exec/memory-internal.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Declarations for functions which are internal to the memory subsystem. - * - * Copyright 2011 Red Hat, Inc. and/or its affiliates - * - * Authors: - * Avi Kivity <avi@redhat.com> - * - * This work is licensed under the terms of the GNU GPL, version 2 or - * later. See the COPYING file in the top-level directory. - * - */ - -/* - * This header is for use by exec.c, memory.c and accel/tcg/cputlb.c ONLY, - * for declarations which are shared between the memory subsystem's - * internals and the TCG TLB code. Do not include it from elsewhere. - */ - -#ifndef MEMORY_INTERNAL_H -#define MEMORY_INTERNAL_H - -#include "cpu.h" - -#ifndef CONFIG_USER_ONLY -static inline AddressSpaceDispatch *flatview_to_dispatch(FlatView *fv) -{ - return fv->dispatch; -} - -static inline AddressSpaceDispatch *address_space_to_dispatch(AddressSpace *as) -{ - return flatview_to_dispatch(address_space_to_flatview(as)); -} - -FlatView *address_space_get_flatview(AddressSpace *as); -void flatview_unref(FlatView *view); - -extern const MemoryRegionOps unassigned_mem_ops; - -void flatview_add_to_dispatch(FlatView *fv, MemoryRegionSection *section); -AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv); -void address_space_dispatch_compact(AddressSpaceDispatch *d); -void address_space_dispatch_free(AddressSpaceDispatch *d); - -void mtree_print_dispatch(struct AddressSpaceDispatch *d, - MemoryRegion *root); -#endif -#endif diff --git a/include/exec/memory.h b/include/exec/memory.h deleted file mode 100644 index 296fd06..0000000 --- a/include/exec/memory.h +++ /dev/null @@ -1,3177 +0,0 @@ -/* - * Physical memory management API - * - * Copyright 2011 Red Hat, Inc. and/or its affiliates - * - * Authors: - * Avi Kivity <avi@redhat.com> - * - * This work is licensed under the terms of the GNU GPL, version 2. See - * the COPYING file in the top-level directory. - * - */ - -#ifndef MEMORY_H -#define MEMORY_H - -#ifndef CONFIG_USER_ONLY - -#include "exec/cpu-common.h" -#include "exec/hwaddr.h" -#include "exec/memattrs.h" -#include "exec/memop.h" -#include "exec/ramlist.h" -#include "qemu/bswap.h" -#include "qemu/queue.h" -#include "qemu/int128.h" -#include "qemu/range.h" -#include "qemu/notify.h" -#include "qom/object.h" -#include "qemu/rcu.h" - -#define RAM_ADDR_INVALID (~(ram_addr_t)0) - -#define MAX_PHYS_ADDR_SPACE_BITS 62 -#define MAX_PHYS_ADDR (((hwaddr)1 << MAX_PHYS_ADDR_SPACE_BITS) - 1) - -#define TYPE_MEMORY_REGION "memory-region" -DECLARE_INSTANCE_CHECKER(MemoryRegion, MEMORY_REGION, - TYPE_MEMORY_REGION) - -#define TYPE_IOMMU_MEMORY_REGION "iommu-memory-region" -typedef struct IOMMUMemoryRegionClass IOMMUMemoryRegionClass; -DECLARE_OBJ_CHECKERS(IOMMUMemoryRegion, IOMMUMemoryRegionClass, - IOMMU_MEMORY_REGION, TYPE_IOMMU_MEMORY_REGION) - -#define TYPE_RAM_DISCARD_MANAGER "ram-discard-manager" -typedef struct RamDiscardManagerClass RamDiscardManagerClass; -typedef struct RamDiscardManager RamDiscardManager; -DECLARE_OBJ_CHECKERS(RamDiscardManager, RamDiscardManagerClass, - RAM_DISCARD_MANAGER, TYPE_RAM_DISCARD_MANAGER); - -#ifdef CONFIG_FUZZ -void fuzz_dma_read_cb(size_t addr, - size_t len, - MemoryRegion *mr); -#else -static inline void fuzz_dma_read_cb(size_t addr, - size_t len, - MemoryRegion *mr) -{ - /* Do Nothing */ -} -#endif - -/* Possible bits for global_dirty_log_{start|stop} */ - -/* Dirty tracking enabled because migration is running */ -#define GLOBAL_DIRTY_MIGRATION (1U << 0) - -/* Dirty tracking enabled because measuring dirty rate */ -#define GLOBAL_DIRTY_DIRTY_RATE (1U << 1) - -/* Dirty tracking enabled because dirty limit */ -#define GLOBAL_DIRTY_LIMIT (1U << 2) - -#define GLOBAL_DIRTY_MASK (0x7) - -extern unsigned int global_dirty_tracking; - -typedef struct MemoryRegionOps MemoryRegionOps; - -struct ReservedRegion { - Range range; - unsigned type; -}; - -/** - * struct MemoryRegionSection: describes a fragment of a #MemoryRegion - * - * @mr: the region, or %NULL if empty - * @fv: the flat view of the address space the region is mapped in - * @offset_within_region: the beginning of the section, relative to @mr's start - * @size: the size of the section; will not exceed @mr's boundaries - * @offset_within_address_space: the address of the first byte of the section - * relative to the region's address space - * @readonly: writes to this section are ignored - * @nonvolatile: this section is non-volatile - * @unmergeable: this section should not get merged with adjacent sections - */ -struct MemoryRegionSection { - Int128 size; - MemoryRegion *mr; - FlatView *fv; - hwaddr offset_within_region; - hwaddr offset_within_address_space; - bool readonly; - bool nonvolatile; - bool unmergeable; -}; - -typedef struct IOMMUTLBEntry IOMMUTLBEntry; - -/* See address_space_translate: bit 0 is read, bit 1 is write. */ -typedef enum { - IOMMU_NONE = 0, - IOMMU_RO = 1, - IOMMU_WO = 2, - IOMMU_RW = 3, -} IOMMUAccessFlags; - -#define IOMMU_ACCESS_FLAG(r, w) (((r) ? IOMMU_RO : 0) | ((w) ? IOMMU_WO : 0)) - -struct IOMMUTLBEntry { - AddressSpace *target_as; - hwaddr iova; - hwaddr translated_addr; - hwaddr addr_mask; /* 0xfff = 4k translation */ - IOMMUAccessFlags perm; -}; - -/* - * Bitmap for different IOMMUNotifier capabilities. Each notifier can - * register with one or multiple IOMMU Notifier capability bit(s). - * - * Normally there're two use cases for the notifiers: - * - * (1) When the device needs accurate synchronizations of the vIOMMU page - * tables, it needs to register with both MAP|UNMAP notifies (which - * is defined as IOMMU_NOTIFIER_IOTLB_EVENTS below). - * - * Regarding to accurate synchronization, it's when the notified - * device maintains a shadow page table and must be notified on each - * guest MAP (page table entry creation) and UNMAP (invalidation) - * events (e.g. VFIO). Both notifications must be accurate so that - * the shadow page table is fully in sync with the guest view. - * - * (2) When the device doesn't need accurate synchronizations of the - * vIOMMU page tables, it needs to register only with UNMAP or - * DEVIOTLB_UNMAP notifies. - * - * It's when the device maintains a cache of IOMMU translations - * (IOTLB) and is able to fill that cache by requesting translations - * from the vIOMMU through a protocol similar to ATS (Address - * Translation Service). - * - * Note that in this mode the vIOMMU will not maintain a shadowed - * page table for the address space, and the UNMAP messages can cover - * more than the pages that used to get mapped. The IOMMU notifiee - * should be able to take care of over-sized invalidations. - */ -typedef enum { - IOMMU_NOTIFIER_NONE = 0, - /* Notify cache invalidations */ - IOMMU_NOTIFIER_UNMAP = 0x1, - /* Notify entry changes (newly created entries) */ - IOMMU_NOTIFIER_MAP = 0x2, - /* Notify changes on device IOTLB entries */ - IOMMU_NOTIFIER_DEVIOTLB_UNMAP = 0x04, -} IOMMUNotifierFlag; - -#define IOMMU_NOTIFIER_IOTLB_EVENTS (IOMMU_NOTIFIER_MAP | IOMMU_NOTIFIER_UNMAP) -#define IOMMU_NOTIFIER_DEVIOTLB_EVENTS IOMMU_NOTIFIER_DEVIOTLB_UNMAP -#define IOMMU_NOTIFIER_ALL (IOMMU_NOTIFIER_IOTLB_EVENTS | \ - IOMMU_NOTIFIER_DEVIOTLB_EVENTS) - -struct IOMMUNotifier; -typedef void (*IOMMUNotify)(struct IOMMUNotifier *notifier, - IOMMUTLBEntry *data); - -struct IOMMUNotifier { - IOMMUNotify notify; - IOMMUNotifierFlag notifier_flags; - /* Notify for address space range start <= addr <= end */ - hwaddr start; - hwaddr end; - int iommu_idx; - QLIST_ENTRY(IOMMUNotifier) node; -}; -typedef struct IOMMUNotifier IOMMUNotifier; - -typedef struct IOMMUTLBEvent { - IOMMUNotifierFlag type; - IOMMUTLBEntry entry; -} IOMMUTLBEvent; - -/* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */ -#define RAM_PREALLOC (1 << 0) - -/* RAM is mmap-ed with MAP_SHARED */ -#define RAM_SHARED (1 << 1) - -/* Only a portion of RAM (used_length) is actually used, and migrated. - * Resizing RAM while migrating can result in the migration being canceled. - */ -#define RAM_RESIZEABLE (1 << 2) - -/* UFFDIO_ZEROPAGE is available on this RAMBlock to atomically - * zero the page and wake waiting processes. - * (Set during postcopy) - */ -#define RAM_UF_ZEROPAGE (1 << 3) - -/* RAM can be migrated */ -#define RAM_MIGRATABLE (1 << 4) - -/* RAM is a persistent kind memory */ -#define RAM_PMEM (1 << 5) - - -/* - * UFFDIO_WRITEPROTECT is used on this RAMBlock to - * support 'write-tracking' migration type. - * Implies ram_state->ram_wt_enabled. - */ -#define RAM_UF_WRITEPROTECT (1 << 6) - -/* - * RAM is mmap-ed with MAP_NORESERVE. When set, reserving swap space (or huge - * pages if applicable) is skipped: will bail out if not supported. When not - * set, the OS will do the reservation, if supported for the memory type. - */ -#define RAM_NORESERVE (1 << 7) - -/* RAM that isn't accessible through normal means. */ -#define RAM_PROTECTED (1 << 8) - -/* RAM is an mmap-ed named file */ -#define RAM_NAMED_FILE (1 << 9) - -/* RAM is mmap-ed read-only */ -#define RAM_READONLY (1 << 10) - -/* RAM FD is opened read-only */ -#define RAM_READONLY_FD (1 << 11) - -/* RAM can be private that has kvm guest memfd backend */ -#define RAM_GUEST_MEMFD (1 << 12) - -static inline void iommu_notifier_init(IOMMUNotifier *n, IOMMUNotify fn, - IOMMUNotifierFlag flags, - hwaddr start, hwaddr end, - int iommu_idx) -{ - n->notify = fn; - n->notifier_flags = flags; - n->start = start; - n->end = end; - n->iommu_idx = iommu_idx; -} - -/* - * Memory region callbacks - */ -struct MemoryRegionOps { - /* Read from the memory region. @addr is relative to @mr; @size is - * in bytes. */ - uint64_t (*read)(void *opaque, - hwaddr addr, - unsigned size); - /* Write to the memory region. @addr is relative to @mr; @size is - * in bytes. */ - void (*write)(void *opaque, - hwaddr addr, - uint64_t data, - unsigned size); - - MemTxResult (*read_with_attrs)(void *opaque, - hwaddr addr, - uint64_t *data, - unsigned size, - MemTxAttrs attrs); - MemTxResult (*write_with_attrs)(void *opaque, - hwaddr addr, - uint64_t data, - unsigned size, - MemTxAttrs attrs); - - enum device_endian endianness; - /* Guest-visible constraints: */ - struct { - /* If nonzero, specify bounds on access sizes beyond which a machine - * check is thrown. - */ - unsigned min_access_size; - unsigned max_access_size; - /* If true, unaligned accesses are supported. Otherwise unaligned - * accesses throw machine checks. - */ - bool unaligned; - /* - * If present, and returns #false, the transaction is not accepted - * by the device (and results in machine dependent behaviour such - * as a machine check exception). - */ - bool (*accepts)(void *opaque, hwaddr addr, - unsigned size, bool is_write, - MemTxAttrs attrs); - } valid; - /* Internal implementation constraints: */ - struct { - /* If nonzero, specifies the minimum size implemented. Smaller sizes - * will be rounded upwards and a partial result will be returned. - */ - unsigned min_access_size; - /* If nonzero, specifies the maximum size implemented. Larger sizes - * will be done as a series of accesses with smaller sizes. - */ - unsigned max_access_size; - /* If true, unaligned accesses are supported. Otherwise all accesses - * are converted to (possibly multiple) naturally aligned accesses. - */ - bool unaligned; - } impl; -}; - -typedef struct MemoryRegionClass { - /* private */ - ObjectClass parent_class; -} MemoryRegionClass; - - -enum IOMMUMemoryRegionAttr { - IOMMU_ATTR_SPAPR_TCE_FD -}; - -/* - * IOMMUMemoryRegionClass: - * - * All IOMMU implementations need to subclass TYPE_IOMMU_MEMORY_REGION - * and provide an implementation of at least the @translate method here - * to handle requests to the memory region. Other methods are optional. - * - * The IOMMU implementation must use the IOMMU notifier infrastructure - * to report whenever mappings are changed, by calling - * memory_region_notify_iommu() (or, if necessary, by calling - * memory_region_notify_iommu_one() for each registered notifier). - * - * Conceptually an IOMMU provides a mapping from input address - * to an output TLB entry. If the IOMMU is aware of memory transaction - * attributes and the output TLB entry depends on the transaction - * attributes, we represent this using IOMMU indexes. Each index - * selects a particular translation table that the IOMMU has: - * - * @attrs_to_index returns the IOMMU index for a set of transaction attributes - * - * @translate takes an input address and an IOMMU index - * - * and the mapping returned can only depend on the input address and the - * IOMMU index. - * - * Most IOMMUs don't care about the transaction attributes and support - * only a single IOMMU index. A more complex IOMMU might have one index - * for secure transactions and one for non-secure transactions. - */ -struct IOMMUMemoryRegionClass { - /* private: */ - MemoryRegionClass parent_class; - - /* public: */ - /** - * @translate: - * - * Return a TLB entry that contains a given address. - * - * The IOMMUAccessFlags indicated via @flag are optional and may - * be specified as IOMMU_NONE to indicate that the caller needs - * the full translation information for both reads and writes. If - * the access flags are specified then the IOMMU implementation - * may use this as an optimization, to stop doing a page table - * walk as soon as it knows that the requested permissions are not - * allowed. If IOMMU_NONE is passed then the IOMMU must do the - * full page table walk and report the permissions in the returned - * IOMMUTLBEntry. (Note that this implies that an IOMMU may not - * return different mappings for reads and writes.) - * - * The returned information remains valid while the caller is - * holding the big QEMU lock or is inside an RCU critical section; - * if the caller wishes to cache the mapping beyond that it must - * register an IOMMU notifier so it can invalidate its cached - * information when the IOMMU mapping changes. - * - * @iommu: the IOMMUMemoryRegion - * - * @hwaddr: address to be translated within the memory region - * - * @flag: requested access permission - * - * @iommu_idx: IOMMU index for the translation - */ - IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag, int iommu_idx); - /** - * @get_min_page_size: - * - * Returns minimum supported page size in bytes. - * - * If this method is not provided then the minimum is assumed to - * be TARGET_PAGE_SIZE. - * - * @iommu: the IOMMUMemoryRegion - */ - uint64_t (*get_min_page_size)(IOMMUMemoryRegion *iommu); - /** - * @notify_flag_changed: - * - * Called when IOMMU Notifier flag changes (ie when the set of - * events which IOMMU users are requesting notification for changes). - * Optional method -- need not be provided if the IOMMU does not - * need to know exactly which events must be notified. - * - * @iommu: the IOMMUMemoryRegion - * - * @old_flags: events which previously needed to be notified - * - * @new_flags: events which now need to be notified - * - * Returns 0 on success, or a negative errno; in particular - * returns -EINVAL if the new flag bitmap is not supported by the - * IOMMU memory region. In case of failure, the error object - * must be created - */ - int (*notify_flag_changed)(IOMMUMemoryRegion *iommu, - IOMMUNotifierFlag old_flags, - IOMMUNotifierFlag new_flags, - Error **errp); - /** - * @replay: - * - * Called to handle memory_region_iommu_replay(). - * - * The default implementation of memory_region_iommu_replay() is to - * call the IOMMU translate method for every page in the address space - * with flag == IOMMU_NONE and then call the notifier if translate - * returns a valid mapping. If this method is implemented then it - * overrides the default behaviour, and must provide the full semantics - * of memory_region_iommu_replay(), by calling @notifier for every - * translation present in the IOMMU. - * - * Optional method -- an IOMMU only needs to provide this method - * if the default is inefficient or produces undesirable side effects. - * - * Note: this is not related to record-and-replay functionality. - */ - void (*replay)(IOMMUMemoryRegion *iommu, IOMMUNotifier *notifier); - - /** - * @get_attr: - * - * Get IOMMU misc attributes. This is an optional method that - * can be used to allow users of the IOMMU to get implementation-specific - * information. The IOMMU implements this method to handle calls - * by IOMMU users to memory_region_iommu_get_attr() by filling in - * the arbitrary data pointer for any IOMMUMemoryRegionAttr values that - * the IOMMU supports. If the method is unimplemented then - * memory_region_iommu_get_attr() will always return -EINVAL. - * - * @iommu: the IOMMUMemoryRegion - * - * @attr: attribute being queried - * - * @data: memory to fill in with the attribute data - * - * Returns 0 on success, or a negative errno; in particular - * returns -EINVAL for unrecognized or unimplemented attribute types. - */ - int (*get_attr)(IOMMUMemoryRegion *iommu, enum IOMMUMemoryRegionAttr attr, - void *data); - - /** - * @attrs_to_index: - * - * Return the IOMMU index to use for a given set of transaction attributes. - * - * Optional method: if an IOMMU only supports a single IOMMU index then - * the default implementation of memory_region_iommu_attrs_to_index() - * will return 0. - * - * The indexes supported by an IOMMU must be contiguous, starting at 0. - * - * @iommu: the IOMMUMemoryRegion - * @attrs: memory transaction attributes - */ - int (*attrs_to_index)(IOMMUMemoryRegion *iommu, MemTxAttrs attrs); - - /** - * @num_indexes: - * - * Return the number of IOMMU indexes this IOMMU supports. - * - * Optional method: if this method is not provided, then - * memory_region_iommu_num_indexes() will return 1, indicating that - * only a single IOMMU index is supported. - * - * @iommu: the IOMMUMemoryRegion - */ - int (*num_indexes)(IOMMUMemoryRegion *iommu); -}; - -typedef struct RamDiscardListener RamDiscardListener; -typedef int (*NotifyRamPopulate)(RamDiscardListener *rdl, - MemoryRegionSection *section); -typedef void (*NotifyRamDiscard)(RamDiscardListener *rdl, - MemoryRegionSection *section); - -struct RamDiscardListener { - /* - * @notify_populate: - * - * Notification that previously discarded memory is about to get populated. - * Listeners are able to object. If any listener objects, already - * successfully notified listeners are notified about a discard again. - * - * @rdl: the #RamDiscardListener getting notified - * @section: the #MemoryRegionSection to get populated. The section - * is aligned within the memory region to the minimum granularity - * unless it would exceed the registered section. - * - * Returns 0 on success. If the notification is rejected by the listener, - * an error is returned. - */ - NotifyRamPopulate notify_populate; - - /* - * @notify_discard: - * - * Notification that previously populated memory was discarded successfully - * and listeners should drop all references to such memory and prevent - * new population (e.g., unmap). - * - * @rdl: the #RamDiscardListener getting notified - * @section: the #MemoryRegionSection to get populated. The section - * is aligned within the memory region to the minimum granularity - * unless it would exceed the registered section. - */ - NotifyRamDiscard notify_discard; - - /* - * @double_discard_supported: - * - * The listener suppors getting @notify_discard notifications that span - * already discarded parts. - */ - bool double_discard_supported; - - MemoryRegionSection *section; - QLIST_ENTRY(RamDiscardListener) next; -}; - -static inline void ram_discard_listener_init(RamDiscardListener *rdl, - NotifyRamPopulate populate_fn, - NotifyRamDiscard discard_fn, - bool double_discard_supported) -{ - rdl->notify_populate = populate_fn; - rdl->notify_discard = discard_fn; - rdl->double_discard_supported = double_discard_supported; -} - -typedef int (*ReplayRamPopulate)(MemoryRegionSection *section, void *opaque); -typedef void (*ReplayRamDiscard)(MemoryRegionSection *section, void *opaque); - -/* - * RamDiscardManagerClass: - * - * A #RamDiscardManager coordinates which parts of specific RAM #MemoryRegion - * regions are currently populated to be used/accessed by the VM, notifying - * after parts were discarded (freeing up memory) and before parts will be - * populated (consuming memory), to be used/accessed by the VM. - * - * A #RamDiscardManager can only be set for a RAM #MemoryRegion while the - * #MemoryRegion isn't mapped into an address space yet (either directly - * or via an alias); it cannot change while the #MemoryRegion is - * mapped into an address space. - * - * The #RamDiscardManager is intended to be used by technologies that are - * incompatible with discarding of RAM (e.g., VFIO, which may pin all - * memory inside a #MemoryRegion), and require proper coordination to only - * map the currently populated parts, to hinder parts that are expected to - * remain discarded from silently getting populated and consuming memory. - * Technologies that support discarding of RAM don't have to bother and can - * simply map the whole #MemoryRegion. - * - * An example #RamDiscardManager is virtio-mem, which logically (un)plugs - * memory within an assigned RAM #MemoryRegion, coordinated with the VM. - * Logically unplugging memory consists of discarding RAM. The VM agreed to not - * access unplugged (discarded) memory - especially via DMA. virtio-mem will - * properly coordinate with listeners before memory is plugged (populated), - * and after memory is unplugged (discarded). - * - * Listeners are called in multiples of the minimum granularity (unless it - * would exceed the registered range) and changes are aligned to the minimum - * granularity within the #MemoryRegion. Listeners have to prepare for memory - * becoming discarded in a different granularity than it was populated and the - * other way around. - */ -struct RamDiscardManagerClass { - /* private */ - InterfaceClass parent_class; - - /* public */ - - /** - * @get_min_granularity: - * - * Get the minimum granularity in which listeners will get notified - * about changes within the #MemoryRegion via the #RamDiscardManager. - * - * @rdm: the #RamDiscardManager - * @mr: the #MemoryRegion - * - * Returns the minimum granularity. - */ - uint64_t (*get_min_granularity)(const RamDiscardManager *rdm, - const MemoryRegion *mr); - - /** - * @is_populated: - * - * Check whether the given #MemoryRegionSection is completely populated - * (i.e., no parts are currently discarded) via the #RamDiscardManager. - * There are no alignment requirements. - * - * @rdm: the #RamDiscardManager - * @section: the #MemoryRegionSection - * - * Returns whether the given range is completely populated. - */ - bool (*is_populated)(const RamDiscardManager *rdm, - const MemoryRegionSection *section); - - /** - * @replay_populated: - * - * Call the #ReplayRamPopulate callback for all populated parts within the - * #MemoryRegionSection via the #RamDiscardManager. - * - * In case any call fails, no further calls are made. - * - * @rdm: the #RamDiscardManager - * @section: the #MemoryRegionSection - * @replay_fn: the #ReplayRamPopulate callback - * @opaque: pointer to forward to the callback - * - * Returns 0 on success, or a negative error if any notification failed. - */ - int (*replay_populated)(const RamDiscardManager *rdm, - MemoryRegionSection *section, - ReplayRamPopulate replay_fn, void *opaque); - - /** - * @replay_discarded: - * - * Call the #ReplayRamDiscard callback for all discarded parts within the - * #MemoryRegionSection via the #RamDiscardManager. - * - * @rdm: the #RamDiscardManager - * @section: the #MemoryRegionSection - * @replay_fn: the #ReplayRamDiscard callback - * @opaque: pointer to forward to the callback - */ - void (*replay_discarded)(const RamDiscardManager *rdm, - MemoryRegionSection *section, - ReplayRamDiscard replay_fn, void *opaque); - - /** - * @register_listener: - * - * Register a #RamDiscardListener for the given #MemoryRegionSection and - * immediately notify the #RamDiscardListener about all populated parts - * within the #MemoryRegionSection via the #RamDiscardManager. - * - * In case any notification fails, no further notifications are triggered - * and an error is logged. - * - * @rdm: the #RamDiscardManager - * @rdl: the #RamDiscardListener - * @section: the #MemoryRegionSection - */ - void (*register_listener)(RamDiscardManager *rdm, - RamDiscardListener *rdl, - MemoryRegionSection *section); - - /** - * @unregister_listener: - * - * Unregister a previously registered #RamDiscardListener via the - * #RamDiscardManager after notifying the #RamDiscardListener about all - * populated parts becoming unpopulated within the registered - * #MemoryRegionSection. - * - * @rdm: the #RamDiscardManager - * @rdl: the #RamDiscardListener - */ - void (*unregister_listener)(RamDiscardManager *rdm, - RamDiscardListener *rdl); -}; - -uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm, - const MemoryRegion *mr); - -bool ram_discard_manager_is_populated(const RamDiscardManager *rdm, - const MemoryRegionSection *section); - -int ram_discard_manager_replay_populated(const RamDiscardManager *rdm, - MemoryRegionSection *section, - ReplayRamPopulate replay_fn, - void *opaque); - -void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm, - MemoryRegionSection *section, - ReplayRamDiscard replay_fn, - void *opaque); - -void ram_discard_manager_register_listener(RamDiscardManager *rdm, - RamDiscardListener *rdl, - MemoryRegionSection *section); - -void ram_discard_manager_unregister_listener(RamDiscardManager *rdm, - RamDiscardListener *rdl); - -/** - * memory_get_xlat_addr: Extract addresses from a TLB entry - * - * @iotlb: pointer to an #IOMMUTLBEntry - * @vaddr: virtual address - * @ram_addr: RAM address - * @read_only: indicates if writes are allowed - * @mr_has_discard_manager: indicates memory is controlled by a - * RamDiscardManager - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr, - ram_addr_t *ram_addr, bool *read_only, - bool *mr_has_discard_manager, Error **errp); - -typedef struct CoalescedMemoryRange CoalescedMemoryRange; -typedef struct MemoryRegionIoeventfd MemoryRegionIoeventfd; - -/** MemoryRegion: - * - * A struct representing a memory region. - */ -struct MemoryRegion { - Object parent_obj; - - /* private: */ - - /* The following fields should fit in a cache line */ - bool romd_mode; - bool ram; - bool subpage; - bool readonly; /* For RAM regions */ - bool nonvolatile; - bool rom_device; - bool flush_coalesced_mmio; - bool unmergeable; - uint8_t dirty_log_mask; - bool is_iommu; - RAMBlock *ram_block; - Object *owner; - /* owner as TYPE_DEVICE. Used for re-entrancy checks in MR access hotpath */ - DeviceState *dev; - - const MemoryRegionOps *ops; - void *opaque; - MemoryRegion *container; - int mapped_via_alias; /* Mapped via an alias, container might be NULL */ - Int128 size; - hwaddr addr; - void (*destructor)(MemoryRegion *mr); - uint64_t align; - bool terminates; - bool ram_device; - bool enabled; - bool warning_printed; /* For reservations */ - uint8_t vga_logging_count; - MemoryRegion *alias; - hwaddr alias_offset; - int32_t priority; - QTAILQ_HEAD(, MemoryRegion) subregions; - QTAILQ_ENTRY(MemoryRegion) subregions_link; - QTAILQ_HEAD(, CoalescedMemoryRange) coalesced; - const char *name; - unsigned ioeventfd_nb; - MemoryRegionIoeventfd *ioeventfds; - RamDiscardManager *rdm; /* Only for RAM */ - - /* For devices designed to perform re-entrant IO into their own IO MRs */ - bool disable_reentrancy_guard; -}; - -struct IOMMUMemoryRegion { - MemoryRegion parent_obj; - - QLIST_HEAD(, IOMMUNotifier) iommu_notify; - IOMMUNotifierFlag iommu_notify_flags; -}; - -#define IOMMU_NOTIFIER_FOREACH(n, mr) \ - QLIST_FOREACH((n), &(mr)->iommu_notify, node) - -#define MEMORY_LISTENER_PRIORITY_MIN 0 -#define MEMORY_LISTENER_PRIORITY_ACCEL 10 -#define MEMORY_LISTENER_PRIORITY_DEV_BACKEND 10 - -/** - * struct MemoryListener: callbacks structure for updates to the physical memory map - * - * Allows a component to adjust to changes in the guest-visible memory map. - * Use with memory_listener_register() and memory_listener_unregister(). - */ -struct MemoryListener { - /** - * @begin: - * - * Called at the beginning of an address space update transaction. - * Followed by calls to #MemoryListener.region_add(), - * #MemoryListener.region_del(), #MemoryListener.region_nop(), - * #MemoryListener.log_start() and #MemoryListener.log_stop() in - * increasing address order. - * - * @listener: The #MemoryListener. - */ - void (*begin)(MemoryListener *listener); - - /** - * @commit: - * - * Called at the end of an address space update transaction, - * after the last call to #MemoryListener.region_add(), - * #MemoryListener.region_del() or #MemoryListener.region_nop(), - * #MemoryListener.log_start() and #MemoryListener.log_stop(). - * - * @listener: The #MemoryListener. - */ - void (*commit)(MemoryListener *listener); - - /** - * @region_add: - * - * Called during an address space update transaction, - * for a section of the address space that is new in this address space - * space since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The new #MemoryRegionSection. - */ - void (*region_add)(MemoryListener *listener, MemoryRegionSection *section); - - /** - * @region_del: - * - * Called during an address space update transaction, - * for a section of the address space that has disappeared in the address - * space since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The old #MemoryRegionSection. - */ - void (*region_del)(MemoryListener *listener, MemoryRegionSection *section); - - /** - * @region_nop: - * - * Called during an address space update transaction, - * for a section of the address space that is in the same place in the address - * space as in the last transaction. - * - * @listener: The #MemoryListener. - * @section: The #MemoryRegionSection. - */ - void (*region_nop)(MemoryListener *listener, MemoryRegionSection *section); - - /** - * @log_start: - * - * Called during an address space update transaction, after - * one of #MemoryListener.region_add(), #MemoryListener.region_del() or - * #MemoryListener.region_nop(), if dirty memory logging clients have - * become active since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The #MemoryRegionSection. - * @old: A bitmap of dirty memory logging clients that were active in - * the previous transaction. - * @new: A bitmap of dirty memory logging clients that are active in - * the current transaction. - */ - void (*log_start)(MemoryListener *listener, MemoryRegionSection *section, - int old_val, int new_val); - - /** - * @log_stop: - * - * Called during an address space update transaction, after - * one of #MemoryListener.region_add(), #MemoryListener.region_del() or - * #MemoryListener.region_nop() and possibly after - * #MemoryListener.log_start(), if dirty memory logging clients have - * become inactive since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The #MemoryRegionSection. - * @old: A bitmap of dirty memory logging clients that were active in - * the previous transaction. - * @new: A bitmap of dirty memory logging clients that are active in - * the current transaction. - */ - void (*log_stop)(MemoryListener *listener, MemoryRegionSection *section, - int old_val, int new_val); - - /** - * @log_sync: - * - * Called by memory_region_snapshot_and_clear_dirty() and - * memory_global_dirty_log_sync(), before accessing QEMU's "official" - * copy of the dirty memory bitmap for a #MemoryRegionSection. - * - * @listener: The #MemoryListener. - * @section: The #MemoryRegionSection. - */ - void (*log_sync)(MemoryListener *listener, MemoryRegionSection *section); - - /** - * @log_sync_global: - * - * This is the global version of @log_sync when the listener does - * not have a way to synchronize the log with finer granularity. - * When the listener registers with @log_sync_global defined, then - * its @log_sync must be NULL. Vice versa. - * - * @listener: The #MemoryListener. - * @last_stage: The last stage to synchronize the log during migration. - * The caller should guarantee that the synchronization with true for - * @last_stage is triggered for once after all VCPUs have been stopped. - */ - void (*log_sync_global)(MemoryListener *listener, bool last_stage); - - /** - * @log_clear: - * - * Called before reading the dirty memory bitmap for a - * #MemoryRegionSection. - * - * @listener: The #MemoryListener. - * @section: The #MemoryRegionSection. - */ - void (*log_clear)(MemoryListener *listener, MemoryRegionSection *section); - - /** - * @log_global_start: - * - * Called by memory_global_dirty_log_start(), which - * enables the %DIRTY_LOG_MIGRATION client on all memory regions in - * the address space. #MemoryListener.log_global_start() is also - * called when a #MemoryListener is added, if global dirty logging is - * active at that time. - * - * @listener: The #MemoryListener. - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: true on success, else false setting @errp with error. - */ - bool (*log_global_start)(MemoryListener *listener, Error **errp); - - /** - * @log_global_stop: - * - * Called by memory_global_dirty_log_stop(), which - * disables the %DIRTY_LOG_MIGRATION client on all memory regions in - * the address space. - * - * @listener: The #MemoryListener. - */ - void (*log_global_stop)(MemoryListener *listener); - - /** - * @log_global_after_sync: - * - * Called after reading the dirty memory bitmap - * for any #MemoryRegionSection. - * - * @listener: The #MemoryListener. - */ - void (*log_global_after_sync)(MemoryListener *listener); - - /** - * @eventfd_add: - * - * Called during an address space update transaction, - * for a section of the address space that has had a new ioeventfd - * registration since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The new #MemoryRegionSection. - * @match_data: The @match_data parameter for the new ioeventfd. - * @data: The @data parameter for the new ioeventfd. - * @e: The #EventNotifier parameter for the new ioeventfd. - */ - void (*eventfd_add)(MemoryListener *listener, MemoryRegionSection *section, - bool match_data, uint64_t data, EventNotifier *e); - - /** - * @eventfd_del: - * - * Called during an address space update transaction, - * for a section of the address space that has dropped an ioeventfd - * registration since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The new #MemoryRegionSection. - * @match_data: The @match_data parameter for the dropped ioeventfd. - * @data: The @data parameter for the dropped ioeventfd. - * @e: The #EventNotifier parameter for the dropped ioeventfd. - */ - void (*eventfd_del)(MemoryListener *listener, MemoryRegionSection *section, - bool match_data, uint64_t data, EventNotifier *e); - - /** - * @coalesced_io_add: - * - * Called during an address space update transaction, - * for a section of the address space that has had a new coalesced - * MMIO range registration since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The new #MemoryRegionSection. - * @addr: The starting address for the coalesced MMIO range. - * @len: The length of the coalesced MMIO range. - */ - void (*coalesced_io_add)(MemoryListener *listener, MemoryRegionSection *section, - hwaddr addr, hwaddr len); - - /** - * @coalesced_io_del: - * - * Called during an address space update transaction, - * for a section of the address space that has dropped a coalesced - * MMIO range since the last transaction. - * - * @listener: The #MemoryListener. - * @section: The new #MemoryRegionSection. - * @addr: The starting address for the coalesced MMIO range. - * @len: The length of the coalesced MMIO range. - */ - void (*coalesced_io_del)(MemoryListener *listener, MemoryRegionSection *section, - hwaddr addr, hwaddr len); - /** - * @priority: - * - * Govern the order in which memory listeners are invoked. Lower priorities - * are invoked earlier for "add" or "start" callbacks, and later for "delete" - * or "stop" callbacks. - */ - unsigned priority; - - /** - * @name: - * - * Name of the listener. It can be used in contexts where we'd like to - * identify one memory listener with the rest. - */ - const char *name; - - /* private: */ - AddressSpace *address_space; - QTAILQ_ENTRY(MemoryListener) link; - QTAILQ_ENTRY(MemoryListener) link_as; -}; - -typedef struct AddressSpaceMapClient { - QEMUBH *bh; - QLIST_ENTRY(AddressSpaceMapClient) link; -} AddressSpaceMapClient; - -typedef struct { - MemoryRegion *mr; - void *buffer; - hwaddr addr; - hwaddr len; - bool in_use; -} BounceBuffer; - -/** - * struct AddressSpace: describes a mapping of addresses to #MemoryRegion objects - */ -struct AddressSpace { - /* private: */ - struct rcu_head rcu; - char *name; - MemoryRegion *root; - - /* Accessed via RCU. */ - struct FlatView *current_map; - - int ioeventfd_nb; - int ioeventfd_notifiers; - struct MemoryRegionIoeventfd *ioeventfds; - QTAILQ_HEAD(, MemoryListener) listeners; - QTAILQ_ENTRY(AddressSpace) address_spaces_link; - - /* Bounce buffer to use for this address space. */ - BounceBuffer bounce; - /* List of callbacks to invoke when buffers free up */ - QemuMutex map_client_list_lock; - QLIST_HEAD(, AddressSpaceMapClient) map_client_list; -}; - -typedef struct AddressSpaceDispatch AddressSpaceDispatch; -typedef struct FlatRange FlatRange; - -/* Flattened global view of current active memory hierarchy. Kept in sorted - * order. - */ -struct FlatView { - struct rcu_head rcu; - unsigned ref; - FlatRange *ranges; - unsigned nr; - unsigned nr_allocated; - struct AddressSpaceDispatch *dispatch; - MemoryRegion *root; -}; - -static inline FlatView *address_space_to_flatview(AddressSpace *as) -{ - return qatomic_rcu_read(&as->current_map); -} - -/** - * typedef flatview_cb: callback for flatview_for_each_range() - * - * @start: start address of the range within the FlatView - * @len: length of the range in bytes - * @mr: MemoryRegion covering this range - * @offset_in_region: offset of the first byte of the range within @mr - * @opaque: data pointer passed to flatview_for_each_range() - * - * Returns: true to stop the iteration, false to keep going. - */ -typedef bool (*flatview_cb)(Int128 start, - Int128 len, - const MemoryRegion *mr, - hwaddr offset_in_region, - void *opaque); - -/** - * flatview_for_each_range: Iterate through a FlatView - * @fv: the FlatView to iterate through - * @cb: function to call for each range - * @opaque: opaque data pointer to pass to @cb - * - * A FlatView is made up of a list of non-overlapping ranges, each of - * which is a slice of a MemoryRegion. This function iterates through - * each range in @fv, calling @cb. The callback function can terminate - * iteration early by returning 'true'. - */ -void flatview_for_each_range(FlatView *fv, flatview_cb cb, void *opaque); - -static inline bool MemoryRegionSection_eq(MemoryRegionSection *a, - MemoryRegionSection *b) -{ - return a->mr == b->mr && - a->fv == b->fv && - a->offset_within_region == b->offset_within_region && - a->offset_within_address_space == b->offset_within_address_space && - int128_eq(a->size, b->size) && - a->readonly == b->readonly && - a->nonvolatile == b->nonvolatile; -} - -/** - * memory_region_section_new_copy: Copy a memory region section - * - * Allocate memory for a new copy, copy the memory region section, and - * properly take a reference on all relevant members. - * - * @s: the #MemoryRegionSection to copy - */ -MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s); - -/** - * memory_region_section_new_copy: Free a copied memory region section - * - * Free a copy of a memory section created via memory_region_section_new_copy(). - * properly dropping references on all relevant members. - * - * @s: the #MemoryRegionSection to copy - */ -void memory_region_section_free_copy(MemoryRegionSection *s); - -/** - * memory_region_init: Initialize a memory region - * - * The region typically acts as a container for other memory regions. Use - * memory_region_add_subregion() to add subregions. - * - * @mr: the #MemoryRegion to be initialized - * @owner: the object that tracks the region's reference count - * @name: used for debugging; not visible to the user or ABI - * @size: size of the region; any subregions beyond this size will be clipped - */ -void memory_region_init(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size); - -/** - * memory_region_ref: Add 1 to a memory region's reference count - * - * Whenever memory regions are accessed outside the BQL, they need to be - * preserved against hot-unplug. MemoryRegions actually do not have their - * own reference count; they piggyback on a QOM object, their "owner". - * This function adds a reference to the owner. - * - * All MemoryRegions must have an owner if they can disappear, even if the - * device they belong to operates exclusively under the BQL. This is because - * the region could be returned at any time by memory_region_find, and this - * is usually under guest control. - * - * @mr: the #MemoryRegion - */ -void memory_region_ref(MemoryRegion *mr); - -/** - * memory_region_unref: Remove 1 to a memory region's reference count - * - * Whenever memory regions are accessed outside the BQL, they need to be - * preserved against hot-unplug. MemoryRegions actually do not have their - * own reference count; they piggyback on a QOM object, their "owner". - * This function removes a reference to the owner and possibly destroys it. - * - * @mr: the #MemoryRegion - */ -void memory_region_unref(MemoryRegion *mr); - -/** - * memory_region_init_io: Initialize an I/O memory region. - * - * Accesses into the region will cause the callbacks in @ops to be called. - * if @size is nonzero, subregions will be clipped to @size. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @ops: a structure containing read and write callbacks to be used when - * I/O is performed on the region. - * @opaque: passed to the read and write callbacks of the @ops structure. - * @name: used for debugging; not visible to the user or ABI - * @size: size of the region. - */ -void memory_region_init_io(MemoryRegion *mr, - Object *owner, - const MemoryRegionOps *ops, - void *opaque, - const char *name, - uint64_t size); - -/** - * memory_region_init_ram_nomigrate: Initialize RAM memory region. Accesses - * into the region will modify memory - * directly. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @errp: pointer to Error*, to store an error if it happens. - * - * Note that this function does not do anything to cause the data in the - * RAM memory region to be migrated; that is the responsibility of the caller. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_ram_nomigrate(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - Error **errp); - -/** - * memory_region_init_ram_flags_nomigrate: Initialize RAM memory region. - * Accesses into the region will - * modify memory directly. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @ram_flags: RamBlock flags. Supported flags: RAM_SHARED, RAM_NORESERVE, - * RAM_GUEST_MEMFD. - * @errp: pointer to Error*, to store an error if it happens. - * - * Note that this function does not do anything to cause the data in the - * RAM memory region to be migrated; that is the responsibility of the caller. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - uint32_t ram_flags, - Error **errp); - -/** - * memory_region_init_resizeable_ram: Initialize memory region with resizable - * RAM. Accesses into the region will - * modify memory directly. Only an initial - * portion of this RAM is actually used. - * Changing the size while migrating - * can result in the migration being - * canceled. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: used size of the region. - * @max_size: max size of the region. - * @resized: callback to notify owner about used size change. - * @errp: pointer to Error*, to store an error if it happens. - * - * Note that this function does not do anything to cause the data in the - * RAM memory region to be migrated; that is the responsibility of the caller. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_resizeable_ram(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - uint64_t max_size, - void (*resized)(const char*, - uint64_t length, - void *host), - Error **errp); -#ifdef CONFIG_POSIX - -/** - * memory_region_init_ram_from_file: Initialize RAM memory region with a - * mmap-ed backend. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @align: alignment of the region base address; if 0, the default alignment - * (getpagesize()) will be used. - * @ram_flags: RamBlock flags. Supported flags: RAM_SHARED, RAM_PMEM, - * RAM_NORESERVE, RAM_PROTECTED, RAM_NAMED_FILE, RAM_READONLY, - * RAM_READONLY_FD, RAM_GUEST_MEMFD - * @path: the path in which to allocate the RAM. - * @offset: offset within the file referenced by path - * @errp: pointer to Error*, to store an error if it happens. - * - * Note that this function does not do anything to cause the data in the - * RAM memory region to be migrated; that is the responsibility of the caller. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_ram_from_file(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - uint64_t align, - uint32_t ram_flags, - const char *path, - ram_addr_t offset, - Error **errp); - -/** - * memory_region_init_ram_from_fd: Initialize RAM memory region with a - * mmap-ed backend. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: the name of the region. - * @size: size of the region. - * @ram_flags: RamBlock flags. Supported flags: RAM_SHARED, RAM_PMEM, - * RAM_NORESERVE, RAM_PROTECTED, RAM_NAMED_FILE, RAM_READONLY, - * RAM_READONLY_FD, RAM_GUEST_MEMFD - * @fd: the fd to mmap. - * @offset: offset within the file referenced by fd - * @errp: pointer to Error*, to store an error if it happens. - * - * Note that this function does not do anything to cause the data in the - * RAM memory region to be migrated; that is the responsibility of the caller. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_ram_from_fd(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - uint32_t ram_flags, - int fd, - ram_addr_t offset, - Error **errp); -#endif - -/** - * memory_region_init_ram_ptr: Initialize RAM memory region from a - * user-provided pointer. Accesses into the - * region will modify memory directly. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @ptr: memory to be mapped; must contain at least @size bytes. - * - * Note that this function does not do anything to cause the data in the - * RAM memory region to be migrated; that is the responsibility of the caller. - */ -void memory_region_init_ram_ptr(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - void *ptr); - -/** - * memory_region_init_ram_device_ptr: Initialize RAM device memory region from - * a user-provided pointer. - * - * A RAM device represents a mapping to a physical device, such as to a PCI - * MMIO BAR of an vfio-pci assigned device. The memory region may be mapped - * into the VM address space and access to the region will modify memory - * directly. However, the memory region should not be included in a memory - * dump (device may not be enabled/mapped at the time of the dump), and - * operations incompatible with manipulating MMIO should be avoided. Replaces - * skip_dump flag. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: the name of the region. - * @size: size of the region. - * @ptr: memory to be mapped; must contain at least @size bytes. - * - * Note that this function does not do anything to cause the data in the - * RAM memory region to be migrated; that is the responsibility of the caller. - * (For RAM device memory regions, migrating the contents rarely makes sense.) - */ -void memory_region_init_ram_device_ptr(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - void *ptr); - -/** - * memory_region_init_alias: Initialize a memory region that aliases all or a - * part of another memory region. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: used for debugging; not visible to the user or ABI - * @orig: the region to be referenced; @mr will be equivalent to - * @orig between @offset and @offset + @size - 1. - * @offset: start of the section in @orig to be referenced. - * @size: size of the region. - */ -void memory_region_init_alias(MemoryRegion *mr, - Object *owner, - const char *name, - MemoryRegion *orig, - hwaddr offset, - uint64_t size); - -/** - * memory_region_init_rom_nomigrate: Initialize a ROM memory region. - * - * This has the same effect as calling memory_region_init_ram_nomigrate() - * and then marking the resulting region read-only with - * memory_region_set_readonly(). - * - * Note that this function does not do anything to cause the data in the - * RAM side of the memory region to be migrated; that is the responsibility - * of the caller. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_rom_nomigrate(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - Error **errp); - -/** - * memory_region_init_rom_device_nomigrate: Initialize a ROM memory region. - * Writes are handled via callbacks. - * - * Note that this function does not do anything to cause the data in the - * RAM side of the memory region to be migrated; that is the responsibility - * of the caller. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @ops: callbacks for write access handling (must not be NULL). - * @opaque: passed to the read and write callbacks of the @ops structure. - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_rom_device_nomigrate(MemoryRegion *mr, - Object *owner, - const MemoryRegionOps *ops, - void *opaque, - const char *name, - uint64_t size, - Error **errp); - -/** - * memory_region_init_iommu: Initialize a memory region of a custom type - * that translates addresses - * - * An IOMMU region translates addresses and forwards accesses to a target - * memory region. - * - * The IOMMU implementation must define a subclass of TYPE_IOMMU_MEMORY_REGION. - * @_iommu_mr should be a pointer to enough memory for an instance of - * that subclass, @instance_size is the size of that subclass, and - * @mrtypename is its name. This function will initialize @_iommu_mr as an - * instance of the subclass, and its methods will then be called to handle - * accesses to the memory region. See the documentation of - * #IOMMUMemoryRegionClass for further details. - * - * @_iommu_mr: the #IOMMUMemoryRegion to be initialized - * @instance_size: the IOMMUMemoryRegion subclass instance size - * @mrtypename: the type name of the #IOMMUMemoryRegion - * @owner: the object that tracks the region's reference count - * @name: used for debugging; not visible to the user or ABI - * @size: size of the region. - */ -void memory_region_init_iommu(void *_iommu_mr, - size_t instance_size, - const char *mrtypename, - Object *owner, - const char *name, - uint64_t size); - -/** - * memory_region_init_ram - Initialize RAM memory region. Accesses into the - * region will modify memory directly. - * - * @mr: the #MemoryRegion to be initialized - * @owner: the object that tracks the region's reference count (must be - * TYPE_DEVICE or a subclass of TYPE_DEVICE, or NULL) - * @name: name of the memory region - * @size: size of the region in bytes - * @errp: pointer to Error*, to store an error if it happens. - * - * This function allocates RAM for a board model or device, and - * arranges for it to be migrated (by calling vmstate_register_ram() - * if @owner is a DeviceState, or vmstate_register_ram_global() if - * @owner is NULL). - * - * TODO: Currently we restrict @owner to being either NULL (for - * global RAM regions with no owner) or devices, so that we can - * give the RAM block a unique name for migration purposes. - * We should lift this restriction and allow arbitrary Objects. - * If you pass a non-NULL non-device @owner then we will assert. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_ram(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - Error **errp); - -bool memory_region_init_ram_guest_memfd(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - Error **errp); - -/** - * memory_region_init_rom: Initialize a ROM memory region. - * - * This has the same effect as calling memory_region_init_ram() - * and then marking the resulting region read-only with - * memory_region_set_readonly(). This includes arranging for the - * contents to be migrated. - * - * TODO: Currently we restrict @owner to being either NULL (for - * global RAM regions with no owner) or devices, so that we can - * give the RAM block a unique name for migration purposes. - * We should lift this restriction and allow arbitrary Objects. - * If you pass a non-NULL non-device @owner then we will assert. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_rom(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - Error **errp); - -/** - * memory_region_init_rom_device: Initialize a ROM memory region. - * Writes are handled via callbacks. - * - * This function initializes a memory region backed by RAM for reads - * and callbacks for writes, and arranges for the RAM backing to - * be migrated (by calling vmstate_register_ram() - * if @owner is a DeviceState, or vmstate_register_ram_global() if - * @owner is NULL). - * - * TODO: Currently we restrict @owner to being either NULL (for - * global RAM regions with no owner) or devices, so that we can - * give the RAM block a unique name for migration purposes. - * We should lift this restriction and allow arbitrary Objects. - * If you pass a non-NULL non-device @owner then we will assert. - * - * @mr: the #MemoryRegion to be initialized. - * @owner: the object that tracks the region's reference count - * @ops: callbacks for write access handling (must not be NULL). - * @opaque: passed to the read and write callbacks of the @ops structure. - * @name: Region name, becomes part of RAMBlock name used in migration stream - * must be unique within any device - * @size: size of the region. - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_region_init_rom_device(MemoryRegion *mr, - Object *owner, - const MemoryRegionOps *ops, - void *opaque, - const char *name, - uint64_t size, - Error **errp); - - -/** - * memory_region_owner: get a memory region's owner. - * - * @mr: the memory region being queried. - */ -Object *memory_region_owner(MemoryRegion *mr); - -/** - * memory_region_size: get a memory region's size. - * - * @mr: the memory region being queried. - */ -uint64_t memory_region_size(MemoryRegion *mr); - -/** - * memory_region_is_ram: check whether a memory region is random access - * - * Returns %true if a memory region is random access. - * - * @mr: the memory region being queried - */ -static inline bool memory_region_is_ram(MemoryRegion *mr) -{ - return mr->ram; -} - -/** - * memory_region_is_ram_device: check whether a memory region is a ram device - * - * Returns %true if a memory region is a device backed ram region - * - * @mr: the memory region being queried - */ -bool memory_region_is_ram_device(MemoryRegion *mr); - -/** - * memory_region_is_romd: check whether a memory region is in ROMD mode - * - * Returns %true if a memory region is a ROM device and currently set to allow - * direct reads. - * - * @mr: the memory region being queried - */ -static inline bool memory_region_is_romd(MemoryRegion *mr) -{ - return mr->rom_device && mr->romd_mode; -} - -/** - * memory_region_is_protected: check whether a memory region is protected - * - * Returns %true if a memory region is protected RAM and cannot be accessed - * via standard mechanisms, e.g. DMA. - * - * @mr: the memory region being queried - */ -bool memory_region_is_protected(MemoryRegion *mr); - -/** - * memory_region_has_guest_memfd: check whether a memory region has guest_memfd - * associated - * - * Returns %true if a memory region's ram_block has valid guest_memfd assigned. - * - * @mr: the memory region being queried - */ -bool memory_region_has_guest_memfd(MemoryRegion *mr); - -/** - * memory_region_get_iommu: check whether a memory region is an iommu - * - * Returns pointer to IOMMUMemoryRegion if a memory region is an iommu, - * otherwise NULL. - * - * @mr: the memory region being queried - */ -static inline IOMMUMemoryRegion *memory_region_get_iommu(MemoryRegion *mr) -{ - if (mr->alias) { - return memory_region_get_iommu(mr->alias); - } - if (mr->is_iommu) { - return (IOMMUMemoryRegion *) mr; - } - return NULL; -} - -/** - * memory_region_get_iommu_class_nocheck: returns iommu memory region class - * if an iommu or NULL if not - * - * Returns pointer to IOMMUMemoryRegionClass if a memory region is an iommu, - * otherwise NULL. This is fast path avoiding QOM checking, use with caution. - * - * @iommu_mr: the memory region being queried - */ -static inline IOMMUMemoryRegionClass *memory_region_get_iommu_class_nocheck( - IOMMUMemoryRegion *iommu_mr) -{ - return (IOMMUMemoryRegionClass *) (((Object *)iommu_mr)->class); -} - -#define memory_region_is_iommu(mr) (memory_region_get_iommu(mr) != NULL) - -/** - * memory_region_iommu_get_min_page_size: get minimum supported page size - * for an iommu - * - * Returns minimum supported page size for an iommu. - * - * @iommu_mr: the memory region being queried - */ -uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr); - -/** - * memory_region_notify_iommu: notify a change in an IOMMU translation entry. - * - * Note: for any IOMMU implementation, an in-place mapping change - * should be notified with an UNMAP followed by a MAP. - * - * @iommu_mr: the memory region that was changed - * @iommu_idx: the IOMMU index for the translation table which has changed - * @event: TLB event with the new entry in the IOMMU translation table. - * The entry replaces all old entries for the same virtual I/O address - * range. - */ -void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, - int iommu_idx, - const IOMMUTLBEvent event); - -/** - * memory_region_notify_iommu_one: notify a change in an IOMMU translation - * entry to a single notifier - * - * This works just like memory_region_notify_iommu(), but it only - * notifies a specific notifier, not all of them. - * - * @notifier: the notifier to be notified - * @event: TLB event with the new entry in the IOMMU translation table. - * The entry replaces all old entries for the same virtual I/O address - * range. - */ -void memory_region_notify_iommu_one(IOMMUNotifier *notifier, - const IOMMUTLBEvent *event); - -/** - * memory_region_unmap_iommu_notifier_range: notify a unmap for an IOMMU - * translation that covers the - * range of a notifier - * - * @notifier: the notifier to be notified - */ -void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier); - - -/** - * memory_region_register_iommu_notifier: register a notifier for changes to - * IOMMU translation entries. - * - * Returns 0 on success, or a negative errno otherwise. In particular, - * -EINVAL indicates that at least one of the attributes of the notifier - * is not supported (flag/range) by the IOMMU memory region. In case of error - * the error object must be created. - * - * @mr: the memory region to observe - * @n: the IOMMUNotifier to be added; the notify callback receives a - * pointer to an #IOMMUTLBEntry as the opaque value; the pointer - * ceases to be valid on exit from the notifier. - * @errp: pointer to Error*, to store an error if it happens. - */ -int memory_region_register_iommu_notifier(MemoryRegion *mr, - IOMMUNotifier *n, Error **errp); - -/** - * memory_region_iommu_replay: replay existing IOMMU translations to - * a notifier with the minimum page granularity returned by - * mr->iommu_ops->get_page_size(). - * - * Note: this is not related to record-and-replay functionality. - * - * @iommu_mr: the memory region to observe - * @n: the notifier to which to replay iommu mappings - */ -void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n); - -/** - * memory_region_unregister_iommu_notifier: unregister a notifier for - * changes to IOMMU translation entries. - * - * @mr: the memory region which was observed and for which notify_stopped() - * needs to be called - * @n: the notifier to be removed. - */ -void memory_region_unregister_iommu_notifier(MemoryRegion *mr, - IOMMUNotifier *n); - -/** - * memory_region_iommu_get_attr: return an IOMMU attr if get_attr() is - * defined on the IOMMU. - * - * Returns 0 on success, or a negative errno otherwise. In particular, - * -EINVAL indicates that the IOMMU does not support the requested - * attribute. - * - * @iommu_mr: the memory region - * @attr: the requested attribute - * @data: a pointer to the requested attribute data - */ -int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr, - enum IOMMUMemoryRegionAttr attr, - void *data); - -/** - * memory_region_iommu_attrs_to_index: return the IOMMU index to - * use for translations with the given memory transaction attributes. - * - * @iommu_mr: the memory region - * @attrs: the memory transaction attributes - */ -int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr, - MemTxAttrs attrs); - -/** - * memory_region_iommu_num_indexes: return the total number of IOMMU - * indexes that this IOMMU supports. - * - * @iommu_mr: the memory region - */ -int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr); - -/** - * memory_region_name: get a memory region's name - * - * Returns the string that was used to initialize the memory region. - * - * @mr: the memory region being queried - */ -const char *memory_region_name(const MemoryRegion *mr); - -/** - * memory_region_is_logging: return whether a memory region is logging writes - * - * Returns %true if the memory region is logging writes for the given client - * - * @mr: the memory region being queried - * @client: the client being queried - */ -bool memory_region_is_logging(MemoryRegion *mr, uint8_t client); - -/** - * memory_region_get_dirty_log_mask: return the clients for which a - * memory region is logging writes. - * - * Returns a bitmap of clients, in which the DIRTY_MEMORY_* constants - * are the bit indices. - * - * @mr: the memory region being queried - */ -uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr); - -/** - * memory_region_is_rom: check whether a memory region is ROM - * - * Returns %true if a memory region is read-only memory. - * - * @mr: the memory region being queried - */ -static inline bool memory_region_is_rom(MemoryRegion *mr) -{ - return mr->ram && mr->readonly; -} - -/** - * memory_region_is_nonvolatile: check whether a memory region is non-volatile - * - * Returns %true is a memory region is non-volatile memory. - * - * @mr: the memory region being queried - */ -static inline bool memory_region_is_nonvolatile(MemoryRegion *mr) -{ - return mr->nonvolatile; -} - -/** - * memory_region_get_fd: Get a file descriptor backing a RAM memory region. - * - * Returns a file descriptor backing a file-based RAM memory region, - * or -1 if the region is not a file-based RAM memory region. - * - * @mr: the RAM or alias memory region being queried. - */ -int memory_region_get_fd(MemoryRegion *mr); - -/** - * memory_region_from_host: Convert a pointer into a RAM memory region - * and an offset within it. - * - * Given a host pointer inside a RAM memory region (created with - * memory_region_init_ram() or memory_region_init_ram_ptr()), return - * the MemoryRegion and the offset within it. - * - * Use with care; by the time this function returns, the returned pointer is - * not protected by RCU anymore. If the caller is not within an RCU critical - * section and does not hold the BQL, it must have other means of - * protecting the pointer, such as a reference to the region that includes - * the incoming ram_addr_t. - * - * @ptr: the host pointer to be converted - * @offset: the offset within memory region - */ -MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset); - -/** - * memory_region_get_ram_ptr: Get a pointer into a RAM memory region. - * - * Returns a host pointer to a RAM memory region (created with - * memory_region_init_ram() or memory_region_init_ram_ptr()). - * - * Use with care; by the time this function returns, the returned pointer is - * not protected by RCU anymore. If the caller is not within an RCU critical - * section and does not hold the BQL, it must have other means of - * protecting the pointer, such as a reference to the region that includes - * the incoming ram_addr_t. - * - * @mr: the memory region being queried. - */ -void *memory_region_get_ram_ptr(MemoryRegion *mr); - -/* memory_region_ram_resize: Resize a RAM region. - * - * Resizing RAM while migrating can result in the migration being canceled. - * Care has to be taken if the guest might have already detected the memory. - * - * @mr: a memory region created with @memory_region_init_resizeable_ram. - * @newsize: the new size the region - * @errp: pointer to Error*, to store an error if it happens. - */ -void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, - Error **errp); - -/** - * memory_region_msync: Synchronize selected address range of - * a memory mapped region - * - * @mr: the memory region to be msync - * @addr: the initial address of the range to be sync - * @size: the size of the range to be sync - */ -void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size); - -/** - * memory_region_writeback: Trigger cache writeback for - * selected address range - * - * @mr: the memory region to be updated - * @addr: the initial address of the range to be written back - * @size: the size of the range to be written back - */ -void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size); - -/** - * memory_region_set_log: Turn dirty logging on or off for a region. - * - * Turns dirty logging on or off for a specified client (display, migration). - * Only meaningful for RAM regions. - * - * @mr: the memory region being updated. - * @log: whether dirty logging is to be enabled or disabled. - * @client: the user of the logging information; %DIRTY_MEMORY_VGA only. - */ -void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client); - -/** - * memory_region_set_dirty: Mark a range of bytes as dirty in a memory region. - * - * Marks a range of bytes as dirty, after it has been dirtied outside - * guest code. - * - * @mr: the memory region being dirtied. - * @addr: the address (relative to the start of the region) being dirtied. - * @size: size of the range being dirtied. - */ -void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, - hwaddr size); - -/** - * memory_region_clear_dirty_bitmap - clear dirty bitmap for memory range - * - * This function is called when the caller wants to clear the remote - * dirty bitmap of a memory range within the memory region. This can - * be used by e.g. KVM to manually clear dirty log when - * KVM_CAP_MANUAL_DIRTY_LOG_PROTECT is declared support by the host - * kernel. - * - * @mr: the memory region to clear the dirty log upon - * @start: start address offset within the memory region - * @len: length of the memory region to clear dirty bitmap - */ -void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start, - hwaddr len); - -/** - * memory_region_snapshot_and_clear_dirty: Get a snapshot of the dirty - * bitmap and clear it. - * - * Creates a snapshot of the dirty bitmap, clears the dirty bitmap and - * returns the snapshot. The snapshot can then be used to query dirty - * status, using memory_region_snapshot_get_dirty. Snapshotting allows - * querying the same page multiple times, which is especially useful for - * display updates where the scanlines often are not page aligned. - * - * The dirty bitmap region which gets copied into the snapshot (and - * cleared afterwards) can be larger than requested. The boundaries - * are rounded up/down so complete bitmap longs (covering 64 pages on - * 64bit hosts) can be copied over into the bitmap snapshot. Which - * isn't a problem for display updates as the extra pages are outside - * the visible area, and in case the visible area changes a full - * display redraw is due anyway. Should other use cases for this - * function emerge we might have to revisit this implementation - * detail. - * - * Use g_free to release DirtyBitmapSnapshot. - * - * @mr: the memory region being queried. - * @addr: the address (relative to the start of the region) being queried. - * @size: the size of the range being queried. - * @client: the user of the logging information; typically %DIRTY_MEMORY_VGA. - */ -DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr, - hwaddr addr, - hwaddr size, - unsigned client); - -/** - * memory_region_snapshot_get_dirty: Check whether a range of bytes is dirty - * in the specified dirty bitmap snapshot. - * - * @mr: the memory region being queried. - * @snap: the dirty bitmap snapshot - * @addr: the address (relative to the start of the region) being queried. - * @size: the size of the range being queried. - */ -bool memory_region_snapshot_get_dirty(MemoryRegion *mr, - DirtyBitmapSnapshot *snap, - hwaddr addr, hwaddr size); - -/** - * memory_region_reset_dirty: Mark a range of pages as clean, for a specified - * client. - * - * Marks a range of pages as no longer dirty. - * - * @mr: the region being updated. - * @addr: the start of the subrange being cleaned. - * @size: the size of the subrange being cleaned. - * @client: the user of the logging information; %DIRTY_MEMORY_MIGRATION or - * %DIRTY_MEMORY_VGA. - */ -void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, - hwaddr size, unsigned client); - -/** - * memory_region_flush_rom_device: Mark a range of pages dirty and invalidate - * TBs (for self-modifying code). - * - * The MemoryRegionOps->write() callback of a ROM device must use this function - * to mark byte ranges that have been modified internally, such as by directly - * accessing the memory returned by memory_region_get_ram_ptr(). - * - * This function marks the range dirty and invalidates TBs so that TCG can - * detect self-modifying code. - * - * @mr: the region being flushed. - * @addr: the start, relative to the start of the region, of the range being - * flushed. - * @size: the size, in bytes, of the range being flushed. - */ -void memory_region_flush_rom_device(MemoryRegion *mr, hwaddr addr, hwaddr size); - -/** - * memory_region_set_readonly: Turn a memory region read-only (or read-write) - * - * Allows a memory region to be marked as read-only (turning it into a ROM). - * only useful on RAM regions. - * - * @mr: the region being updated. - * @readonly: whether rhe region is to be ROM or RAM. - */ -void memory_region_set_readonly(MemoryRegion *mr, bool readonly); - -/** - * memory_region_set_nonvolatile: Turn a memory region non-volatile - * - * Allows a memory region to be marked as non-volatile. - * only useful on RAM regions. - * - * @mr: the region being updated. - * @nonvolatile: whether rhe region is to be non-volatile. - */ -void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile); - -/** - * memory_region_rom_device_set_romd: enable/disable ROMD mode - * - * Allows a ROM device (initialized with memory_region_init_rom_device() to - * set to ROMD mode (default) or MMIO mode. When it is in ROMD mode, the - * device is mapped to guest memory and satisfies read access directly. - * When in MMIO mode, reads are forwarded to the #MemoryRegion.read function. - * Writes are always handled by the #MemoryRegion.write function. - * - * @mr: the memory region to be updated - * @romd_mode: %true to put the region into ROMD mode - */ -void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode); - -/** - * memory_region_set_coalescing: Enable memory coalescing for the region. - * - * Enabled writes to a region to be queued for later processing. MMIO ->write - * callbacks may be delayed until a non-coalesced MMIO is issued. - * Only useful for IO regions. Roughly similar to write-combining hardware. - * - * @mr: the memory region to be write coalesced - */ -void memory_region_set_coalescing(MemoryRegion *mr); - -/** - * memory_region_add_coalescing: Enable memory coalescing for a sub-range of - * a region. - * - * Like memory_region_set_coalescing(), but works on a sub-range of a region. - * Multiple calls can be issued coalesced disjoint ranges. - * - * @mr: the memory region to be updated. - * @offset: the start of the range within the region to be coalesced. - * @size: the size of the subrange to be coalesced. - */ -void memory_region_add_coalescing(MemoryRegion *mr, - hwaddr offset, - uint64_t size); - -/** - * memory_region_clear_coalescing: Disable MMIO coalescing for the region. - * - * Disables any coalescing caused by memory_region_set_coalescing() or - * memory_region_add_coalescing(). Roughly equivalent to uncacheble memory - * hardware. - * - * @mr: the memory region to be updated. - */ -void memory_region_clear_coalescing(MemoryRegion *mr); - -/** - * memory_region_set_flush_coalesced: Enforce memory coalescing flush before - * accesses. - * - * Ensure that pending coalesced MMIO request are flushed before the memory - * region is accessed. This property is automatically enabled for all regions - * passed to memory_region_set_coalescing() and memory_region_add_coalescing(). - * - * @mr: the memory region to be updated. - */ -void memory_region_set_flush_coalesced(MemoryRegion *mr); - -/** - * memory_region_clear_flush_coalesced: Disable memory coalescing flush before - * accesses. - * - * Clear the automatic coalesced MMIO flushing enabled via - * memory_region_set_flush_coalesced. Note that this service has no effect on - * memory regions that have MMIO coalescing enabled for themselves. For them, - * automatic flushing will stop once coalescing is disabled. - * - * @mr: the memory region to be updated. - */ -void memory_region_clear_flush_coalesced(MemoryRegion *mr); - -/** - * memory_region_add_eventfd: Request an eventfd to be triggered when a word - * is written to a location. - * - * Marks a word in an IO region (initialized with memory_region_init_io()) - * as a trigger for an eventfd event. The I/O callback will not be called. - * The caller must be prepared to handle failure (that is, take the required - * action if the callback _is_ called). - * - * @mr: the memory region being updated. - * @addr: the address within @mr that is to be monitored - * @size: the size of the access to trigger the eventfd - * @match_data: whether to match against @data, instead of just @addr - * @data: the data to match against the guest write - * @e: event notifier to be triggered when @addr, @size, and @data all match. - **/ -void memory_region_add_eventfd(MemoryRegion *mr, - hwaddr addr, - unsigned size, - bool match_data, - uint64_t data, - EventNotifier *e); - -/** - * memory_region_del_eventfd: Cancel an eventfd. - * - * Cancels an eventfd trigger requested by a previous - * memory_region_add_eventfd() call. - * - * @mr: the memory region being updated. - * @addr: the address within @mr that is to be monitored - * @size: the size of the access to trigger the eventfd - * @match_data: whether to match against @data, instead of just @addr - * @data: the data to match against the guest write - * @e: event notifier to be triggered when @addr, @size, and @data all match. - */ -void memory_region_del_eventfd(MemoryRegion *mr, - hwaddr addr, - unsigned size, - bool match_data, - uint64_t data, - EventNotifier *e); - -/** - * memory_region_add_subregion: Add a subregion to a container. - * - * Adds a subregion at @offset. The subregion may not overlap with other - * subregions (except for those explicitly marked as overlapping). A region - * may only be added once as a subregion (unless removed with - * memory_region_del_subregion()); use memory_region_init_alias() if you - * want a region to be a subregion in multiple locations. - * - * @mr: the region to contain the new subregion; must be a container - * initialized with memory_region_init(). - * @offset: the offset relative to @mr where @subregion is added. - * @subregion: the subregion to be added. - */ -void memory_region_add_subregion(MemoryRegion *mr, - hwaddr offset, - MemoryRegion *subregion); -/** - * memory_region_add_subregion_overlap: Add a subregion to a container - * with overlap. - * - * Adds a subregion at @offset. The subregion may overlap with other - * subregions. Conflicts are resolved by having a higher @priority hide a - * lower @priority. Subregions without priority are taken as @priority 0. - * A region may only be added once as a subregion (unless removed with - * memory_region_del_subregion()); use memory_region_init_alias() if you - * want a region to be a subregion in multiple locations. - * - * @mr: the region to contain the new subregion; must be a container - * initialized with memory_region_init(). - * @offset: the offset relative to @mr where @subregion is added. - * @subregion: the subregion to be added. - * @priority: used for resolving overlaps; highest priority wins. - */ -void memory_region_add_subregion_overlap(MemoryRegion *mr, - hwaddr offset, - MemoryRegion *subregion, - int priority); - -/** - * memory_region_get_ram_addr: Get the ram address associated with a memory - * region - * - * @mr: the region to be queried - */ -ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr); - -uint64_t memory_region_get_alignment(const MemoryRegion *mr); -/** - * memory_region_del_subregion: Remove a subregion. - * - * Removes a subregion from its container. - * - * @mr: the container to be updated. - * @subregion: the region being removed; must be a current subregion of @mr. - */ -void memory_region_del_subregion(MemoryRegion *mr, - MemoryRegion *subregion); - -/* - * memory_region_set_enabled: dynamically enable or disable a region - * - * Enables or disables a memory region. A disabled memory region - * ignores all accesses to itself and its subregions. It does not - * obscure sibling subregions with lower priority - it simply behaves as - * if it was removed from the hierarchy. - * - * Regions default to being enabled. - * - * @mr: the region to be updated - * @enabled: whether to enable or disable the region - */ -void memory_region_set_enabled(MemoryRegion *mr, bool enabled); - -/* - * memory_region_set_address: dynamically update the address of a region - * - * Dynamically updates the address of a region, relative to its container. - * May be used on regions are currently part of a memory hierarchy. - * - * @mr: the region to be updated - * @addr: new address, relative to container region - */ -void memory_region_set_address(MemoryRegion *mr, hwaddr addr); - -/* - * memory_region_set_size: dynamically update the size of a region. - * - * Dynamically updates the size of a region. - * - * @mr: the region to be updated - * @size: used size of the region. - */ -void memory_region_set_size(MemoryRegion *mr, uint64_t size); - -/* - * memory_region_set_alias_offset: dynamically update a memory alias's offset - * - * Dynamically updates the offset into the target region that an alias points - * to, as if the fourth argument to memory_region_init_alias() has changed. - * - * @mr: the #MemoryRegion to be updated; should be an alias. - * @offset: the new offset into the target memory region - */ -void memory_region_set_alias_offset(MemoryRegion *mr, - hwaddr offset); - -/* - * memory_region_set_unmergeable: Set a memory region unmergeable - * - * Mark a memory region unmergeable, resulting in the memory region (or - * everything contained in a memory region container) not getting merged when - * simplifying the address space and notifying memory listeners. Consequently, - * memory listeners will never get notified about ranges that are larger than - * the original memory regions. - * - * This is primarily useful when multiple aliases to a RAM memory region are - * mapped into a memory region container, and updates (e.g., enable/disable or - * map/unmap) of individual memory region aliases are not supposed to affect - * other memory regions in the same container. - * - * @mr: the #MemoryRegion to be updated - * @unmergeable: whether to mark the #MemoryRegion unmergeable - */ -void memory_region_set_unmergeable(MemoryRegion *mr, bool unmergeable); - -/** - * memory_region_present: checks if an address relative to a @container - * translates into #MemoryRegion within @container - * - * Answer whether a #MemoryRegion within @container covers the address - * @addr. - * - * @container: a #MemoryRegion within which @addr is a relative address - * @addr: the area within @container to be searched - */ -bool memory_region_present(MemoryRegion *container, hwaddr addr); - -/** - * memory_region_is_mapped: returns true if #MemoryRegion is mapped - * into another memory region, which does not necessarily imply that it is - * mapped into an address space. - * - * @mr: a #MemoryRegion which should be checked if it's mapped - */ -bool memory_region_is_mapped(MemoryRegion *mr); - -/** - * memory_region_get_ram_discard_manager: get the #RamDiscardManager for a - * #MemoryRegion - * - * The #RamDiscardManager cannot change while a memory region is mapped. - * - * @mr: the #MemoryRegion - */ -RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr); - -/** - * memory_region_has_ram_discard_manager: check whether a #MemoryRegion has a - * #RamDiscardManager assigned - * - * @mr: the #MemoryRegion - */ -static inline bool memory_region_has_ram_discard_manager(MemoryRegion *mr) -{ - return !!memory_region_get_ram_discard_manager(mr); -} - -/** - * memory_region_set_ram_discard_manager: set the #RamDiscardManager for a - * #MemoryRegion - * - * This function must not be called for a mapped #MemoryRegion, a #MemoryRegion - * that does not cover RAM, or a #MemoryRegion that already has a - * #RamDiscardManager assigned. - * - * @mr: the #MemoryRegion - * @rdm: #RamDiscardManager to set - */ -void memory_region_set_ram_discard_manager(MemoryRegion *mr, - RamDiscardManager *rdm); - -/** - * memory_region_find: translate an address/size relative to a - * MemoryRegion into a #MemoryRegionSection. - * - * Locates the first #MemoryRegion within @mr that overlaps the range - * given by @addr and @size. - * - * Returns a #MemoryRegionSection that describes a contiguous overlap. - * It will have the following characteristics: - * - @size = 0 iff no overlap was found - * - @mr is non-%NULL iff an overlap was found - * - * Remember that in the return value the @offset_within_region is - * relative to the returned region (in the .@mr field), not to the - * @mr argument. - * - * Similarly, the .@offset_within_address_space is relative to the - * address space that contains both regions, the passed and the - * returned one. However, in the special case where the @mr argument - * has no container (and thus is the root of the address space), the - * following will hold: - * - @offset_within_address_space >= @addr - * - @offset_within_address_space + .@size <= @addr + @size - * - * @mr: a MemoryRegion within which @addr is a relative address - * @addr: start of the area within @as to be searched - * @size: size of the area to be searched - */ -MemoryRegionSection memory_region_find(MemoryRegion *mr, - hwaddr addr, uint64_t size); - -/** - * memory_global_dirty_log_sync: synchronize the dirty log for all memory - * - * Synchronizes the dirty page log for all address spaces. - * - * @last_stage: whether this is the last stage of live migration - */ -void memory_global_dirty_log_sync(bool last_stage); - -/** - * memory_global_dirty_log_sync: synchronize the dirty log for all memory - * - * Synchronizes the vCPUs with a thread that is reading the dirty bitmap. - * This function must be called after the dirty log bitmap is cleared, and - * before dirty guest memory pages are read. If you are using - * #DirtyBitmapSnapshot, memory_region_snapshot_and_clear_dirty() takes - * care of doing this. - */ -void memory_global_after_dirty_log_sync(void); - -/** - * memory_region_transaction_begin: Start a transaction. - * - * During a transaction, changes will be accumulated and made visible - * only when the transaction ends (is committed). - */ -void memory_region_transaction_begin(void); - -/** - * memory_region_transaction_commit: Commit a transaction and make changes - * visible to the guest. - */ -void memory_region_transaction_commit(void); - -/** - * memory_listener_register: register callbacks to be called when memory - * sections are mapped or unmapped into an address - * space - * - * @listener: an object containing the callbacks to be called - * @filter: if non-%NULL, only regions in this address space will be observed - */ -void memory_listener_register(MemoryListener *listener, AddressSpace *filter); - -/** - * memory_listener_unregister: undo the effect of memory_listener_register() - * - * @listener: an object containing the callbacks to be removed - */ -void memory_listener_unregister(MemoryListener *listener); - -/** - * memory_global_dirty_log_start: begin dirty logging for all regions - * - * @flags: purpose of starting dirty log, migration or dirty rate - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: true on success, else false setting @errp with error. - */ -bool memory_global_dirty_log_start(unsigned int flags, Error **errp); - -/** - * memory_global_dirty_log_stop: end dirty logging for all regions - * - * @flags: purpose of stopping dirty log, migration or dirty rate - */ -void memory_global_dirty_log_stop(unsigned int flags); - -void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled); - -bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, - unsigned size, bool is_write, - MemTxAttrs attrs); - -/** - * memory_region_dispatch_read: perform a read directly to the specified - * MemoryRegion. - * - * @mr: #MemoryRegion to access - * @addr: address within that region - * @pval: pointer to uint64_t which the data is written to - * @op: size, sign, and endianness of the memory operation - * @attrs: memory transaction attributes to use for the access - */ -MemTxResult memory_region_dispatch_read(MemoryRegion *mr, - hwaddr addr, - uint64_t *pval, - MemOp op, - MemTxAttrs attrs); -/** - * memory_region_dispatch_write: perform a write directly to the specified - * MemoryRegion. - * - * @mr: #MemoryRegion to access - * @addr: address within that region - * @data: data to write - * @op: size, sign, and endianness of the memory operation - * @attrs: memory transaction attributes to use for the access - */ -MemTxResult memory_region_dispatch_write(MemoryRegion *mr, - hwaddr addr, - uint64_t data, - MemOp op, - MemTxAttrs attrs); - -/** - * address_space_init: initializes an address space - * - * @as: an uninitialized #AddressSpace - * @root: a #MemoryRegion that routes addresses for the address space - * @name: an address space name. The name is only used for debugging - * output. - */ -void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name); - -/** - * address_space_destroy: destroy an address space - * - * Releases all resources associated with an address space. After an address space - * is destroyed, its root memory region (given by address_space_init()) may be destroyed - * as well. - * - * @as: address space to be destroyed - */ -void address_space_destroy(AddressSpace *as); - -/** - * address_space_remove_listeners: unregister all listeners of an address space - * - * Removes all callbacks previously registered with memory_listener_register() - * for @as. - * - * @as: an initialized #AddressSpace - */ -void address_space_remove_listeners(AddressSpace *as); - -/** - * address_space_rw: read from or write to an address space. - * - * Return a MemTxResult indicating whether the operation succeeded - * or failed (eg unassigned memory, device rejected the transaction, - * IOMMU fault). - * - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @attrs: memory transaction attributes - * @buf: buffer with the data transferred - * @len: the number of bytes to read or write - * @is_write: indicates the transfer direction - */ -MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, void *buf, - hwaddr len, bool is_write); - -/** - * address_space_write: write to address space. - * - * Return a MemTxResult indicating whether the operation succeeded - * or failed (eg unassigned memory, device rejected the transaction, - * IOMMU fault). - * - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @attrs: memory transaction attributes - * @buf: buffer with the data transferred - * @len: the number of bytes to write - */ -MemTxResult address_space_write(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, - const void *buf, hwaddr len); - -/** - * address_space_write_rom: write to address space, including ROM. - * - * This function writes to the specified address space, but will - * write data to both ROM and RAM. This is used for non-guest - * writes like writes from the gdb debug stub or initial loading - * of ROM contents. - * - * Note that portions of the write which attempt to write data to - * a device will be silently ignored -- only real RAM and ROM will - * be written to. - * - * Return a MemTxResult indicating whether the operation succeeded - * or failed (eg unassigned memory, device rejected the transaction, - * IOMMU fault). - * - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @attrs: memory transaction attributes - * @buf: buffer with the data transferred - * @len: the number of bytes to write - */ -MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, - const void *buf, hwaddr len); - -/* address_space_ld*: load from an address space - * address_space_st*: store to an address space - * - * These functions perform a load or store of the byte, word, - * longword or quad to the specified address within the AddressSpace. - * The _le suffixed functions treat the data as little endian; - * _be indicates big endian; no suffix indicates "same endianness - * as guest CPU". - * - * The "guest CPU endianness" accessors are deprecated for use outside - * target-* code; devices should be CPU-agnostic and use either the LE - * or the BE accessors. - * - * @as #AddressSpace to be accessed - * @addr: address within that address space - * @val: data value, for stores - * @attrs: memory transaction attributes - * @result: location to write the success/failure of the transaction; - * if NULL, this information is discarded - */ - -#define SUFFIX -#define ARG1 as -#define ARG1_DECL AddressSpace *as -#include "exec/memory_ldst.h.inc" - -#define SUFFIX -#define ARG1 as -#define ARG1_DECL AddressSpace *as -#include "exec/memory_ldst_phys.h.inc" - -struct MemoryRegionCache { - uint8_t *ptr; - hwaddr xlat; - hwaddr len; - FlatView *fv; - MemoryRegionSection mrs; - bool is_write; -}; - -/* address_space_ld*_cached: load from a cached #MemoryRegion - * address_space_st*_cached: store into a cached #MemoryRegion - * - * These functions perform a load or store of the byte, word, - * longword or quad to the specified address. The address is - * a physical address in the AddressSpace, but it must lie within - * a #MemoryRegion that was mapped with address_space_cache_init. - * - * The _le suffixed functions treat the data as little endian; - * _be indicates big endian; no suffix indicates "same endianness - * as guest CPU". - * - * The "guest CPU endianness" accessors are deprecated for use outside - * target-* code; devices should be CPU-agnostic and use either the LE - * or the BE accessors. - * - * @cache: previously initialized #MemoryRegionCache to be accessed - * @addr: address within the address space - * @val: data value, for stores - * @attrs: memory transaction attributes - * @result: location to write the success/failure of the transaction; - * if NULL, this information is discarded - */ - -#define SUFFIX _cached_slow -#define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache -#include "exec/memory_ldst.h.inc" - -/* Inline fast path for direct RAM access. */ -static inline uint8_t address_space_ldub_cached(MemoryRegionCache *cache, - hwaddr addr, MemTxAttrs attrs, MemTxResult *result) -{ - assert(addr < cache->len); - if (likely(cache->ptr)) { - return ldub_p(cache->ptr + addr); - } else { - return address_space_ldub_cached_slow(cache, addr, attrs, result); - } -} - -static inline void address_space_stb_cached(MemoryRegionCache *cache, - hwaddr addr, uint8_t val, MemTxAttrs attrs, MemTxResult *result) -{ - assert(addr < cache->len); - if (likely(cache->ptr)) { - stb_p(cache->ptr + addr, val); - } else { - address_space_stb_cached_slow(cache, addr, val, attrs, result); - } -} - -#define ENDIANNESS _le -#include "exec/memory_ldst_cached.h.inc" - -#define ENDIANNESS _be -#include "exec/memory_ldst_cached.h.inc" - -#define SUFFIX _cached -#define ARG1 cache -#define ARG1_DECL MemoryRegionCache *cache -#include "exec/memory_ldst_phys.h.inc" - -/* address_space_cache_init: prepare for repeated access to a physical - * memory region - * - * @cache: #MemoryRegionCache to be filled - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @len: length of buffer - * @is_write: indicates the transfer direction - * - * Will only work with RAM, and may map a subset of the requested range by - * returning a value that is less than @len. On failure, return a negative - * errno value. - * - * Because it only works with RAM, this function can be used for - * read-modify-write operations. In this case, is_write should be %true. - * - * Note that addresses passed to the address_space_*_cached functions - * are relative to @addr. - */ -int64_t address_space_cache_init(MemoryRegionCache *cache, - AddressSpace *as, - hwaddr addr, - hwaddr len, - bool is_write); - -/** - * address_space_cache_init_empty: Initialize empty #MemoryRegionCache - * - * @cache: The #MemoryRegionCache to operate on. - * - * Initializes #MemoryRegionCache structure without memory region attached. - * Cache initialized this way can only be safely destroyed, but not used. - */ -static inline void address_space_cache_init_empty(MemoryRegionCache *cache) -{ - cache->mrs.mr = NULL; - /* There is no real need to initialize fv, but it makes Coverity happy. */ - cache->fv = NULL; -} - -/** - * address_space_cache_invalidate: complete a write to a #MemoryRegionCache - * - * @cache: The #MemoryRegionCache to operate on. - * @addr: The first physical address that was written, relative to the - * address that was passed to @address_space_cache_init. - * @access_len: The number of bytes that were written starting at @addr. - */ -void address_space_cache_invalidate(MemoryRegionCache *cache, - hwaddr addr, - hwaddr access_len); - -/** - * address_space_cache_destroy: free a #MemoryRegionCache - * - * @cache: The #MemoryRegionCache whose memory should be released. - */ -void address_space_cache_destroy(MemoryRegionCache *cache); - -/* address_space_get_iotlb_entry: translate an address into an IOTLB - * entry. Should be called from an RCU critical section. - */ -IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, - bool is_write, MemTxAttrs attrs); - -/* address_space_translate: translate an address range into an address space - * into a MemoryRegion and an address range into that section. Should be - * called from an RCU critical section, to avoid that the last reference - * to the returned region disappears after address_space_translate returns. - * - * @fv: #FlatView to be accessed - * @addr: address within that address space - * @xlat: pointer to address within the returned memory region section's - * #MemoryRegion. - * @len: pointer to length - * @is_write: indicates the transfer direction - * @attrs: memory attributes - */ -MemoryRegion *flatview_translate(FlatView *fv, - hwaddr addr, hwaddr *xlat, - hwaddr *len, bool is_write, - MemTxAttrs attrs); - -static inline MemoryRegion *address_space_translate(AddressSpace *as, - hwaddr addr, hwaddr *xlat, - hwaddr *len, bool is_write, - MemTxAttrs attrs) -{ - return flatview_translate(address_space_to_flatview(as), - addr, xlat, len, is_write, attrs); -} - -/* address_space_access_valid: check for validity of accessing an address - * space range - * - * Check whether memory is assigned to the given address space range, and - * access is permitted by any IOMMU regions that are active for the address - * space. - * - * For now, addr and len should be aligned to a page size. This limitation - * will be lifted in the future. - * - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @len: length of the area to be checked - * @is_write: indicates the transfer direction - * @attrs: memory attributes - */ -bool address_space_access_valid(AddressSpace *as, hwaddr addr, hwaddr len, - bool is_write, MemTxAttrs attrs); - -/* address_space_map: map a physical memory region into a host virtual address - * - * May map a subset of the requested range, given by and returned in @plen. - * May return %NULL and set *@plen to zero(0), if resources needed to perform - * the mapping are exhausted. - * Use only for reads OR writes - not for read-modify-write operations. - * Use address_space_register_map_client() to know when retrying the map - * operation is likely to succeed. - * - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @plen: pointer to length of buffer; updated on return - * @is_write: indicates the transfer direction - * @attrs: memory attributes - */ -void *address_space_map(AddressSpace *as, hwaddr addr, - hwaddr *plen, bool is_write, MemTxAttrs attrs); - -/* address_space_unmap: Unmaps a memory region previously mapped by address_space_map() - * - * Will also mark the memory as dirty if @is_write == %true. @access_len gives - * the amount of memory that was actually read or written by the caller. - * - * @as: #AddressSpace used - * @buffer: host pointer as returned by address_space_map() - * @len: buffer length as returned by address_space_map() - * @access_len: amount of data actually transferred - * @is_write: indicates the transfer direction - */ -void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, - bool is_write, hwaddr access_len); - -/* - * address_space_register_map_client: Register a callback to invoke when - * resources for address_space_map() are available again. - * - * address_space_map may fail when there are not enough resources available, - * such as when bounce buffer memory would exceed the limit. The callback can - * be used to retry the address_space_map operation. Note that the callback - * gets automatically removed after firing. - * - * @as: #AddressSpace to be accessed - * @bh: callback to invoke when address_space_map() retry is appropriate - */ -void address_space_register_map_client(AddressSpace *as, QEMUBH *bh); - -/* - * address_space_unregister_map_client: Unregister a callback that has - * previously been registered and not fired yet. - * - * @as: #AddressSpace to be accessed - * @bh: callback to unregister - */ -void address_space_unregister_map_client(AddressSpace *as, QEMUBH *bh); - -/* Internal functions, part of the implementation of address_space_read. */ -MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, void *buf, hwaddr len); -MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, - MemTxAttrs attrs, void *buf, - hwaddr len, hwaddr addr1, hwaddr l, - MemoryRegion *mr); -void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr); - -/* Internal functions, part of the implementation of address_space_read_cached - * and address_space_write_cached. */ -MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache, - hwaddr addr, void *buf, hwaddr len); -MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache, - hwaddr addr, const void *buf, - hwaddr len); - -int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr); -bool prepare_mmio_access(MemoryRegion *mr); - -static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) -{ - if (is_write) { - return memory_region_is_ram(mr) && !mr->readonly && - !mr->rom_device && !memory_region_is_ram_device(mr); - } else { - return (memory_region_is_ram(mr) && !memory_region_is_ram_device(mr)) || - memory_region_is_romd(mr); - } -} - -/** - * address_space_read: read from an address space. - * - * Return a MemTxResult indicating whether the operation succeeded - * or failed (eg unassigned memory, device rejected the transaction, - * IOMMU fault). Called within RCU critical section. - * - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @attrs: memory transaction attributes - * @buf: buffer with the data transferred - * @len: length of the data transferred - */ -static inline __attribute__((__always_inline__)) -MemTxResult address_space_read(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, void *buf, - hwaddr len) -{ - MemTxResult result = MEMTX_OK; - hwaddr l, addr1; - void *ptr; - MemoryRegion *mr; - FlatView *fv; - - if (__builtin_constant_p(len)) { - if (len) { - RCU_READ_LOCK_GUARD(); - fv = address_space_to_flatview(as); - l = len; - mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); - if (len == l && memory_access_is_direct(mr, false)) { - ptr = qemu_map_ram_ptr(mr->ram_block, addr1); - memcpy(buf, ptr, len); - } else { - result = flatview_read_continue(fv, addr, attrs, buf, len, - addr1, l, mr); - } - } - } else { - result = address_space_read_full(as, addr, attrs, buf, len); - } - return result; -} - -/** - * address_space_read_cached: read from a cached RAM region - * - * @cache: Cached region to be addressed - * @addr: address relative to the base of the RAM region - * @buf: buffer with the data transferred - * @len: length of the data transferred - */ -static inline MemTxResult -address_space_read_cached(MemoryRegionCache *cache, hwaddr addr, - void *buf, hwaddr len) -{ - assert(addr < cache->len && len <= cache->len - addr); - fuzz_dma_read_cb(cache->xlat + addr, len, cache->mrs.mr); - if (likely(cache->ptr)) { - memcpy(buf, cache->ptr + addr, len); - return MEMTX_OK; - } else { - return address_space_read_cached_slow(cache, addr, buf, len); - } -} - -/** - * address_space_write_cached: write to a cached RAM region - * - * @cache: Cached region to be addressed - * @addr: address relative to the base of the RAM region - * @buf: buffer with the data transferred - * @len: length of the data transferred - */ -static inline MemTxResult -address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, - const void *buf, hwaddr len) -{ - assert(addr < cache->len && len <= cache->len - addr); - if (likely(cache->ptr)) { - memcpy(cache->ptr + addr, buf, len); - return MEMTX_OK; - } else { - return address_space_write_cached_slow(cache, addr, buf, len); - } -} - -/** - * address_space_set: Fill address space with a constant byte. - * - * Return a MemTxResult indicating whether the operation succeeded - * or failed (eg unassigned memory, device rejected the transaction, - * IOMMU fault). - * - * @as: #AddressSpace to be accessed - * @addr: address within that address space - * @c: constant byte to fill the memory - * @len: the number of bytes to fill with the constant byte - * @attrs: memory transaction attributes - */ -MemTxResult address_space_set(AddressSpace *as, hwaddr addr, - uint8_t c, hwaddr len, MemTxAttrs attrs); - -#ifdef COMPILING_PER_TARGET -/* enum device_endian to MemOp. */ -static inline MemOp devend_memop(enum device_endian end) -{ - QEMU_BUILD_BUG_ON(DEVICE_HOST_ENDIAN != DEVICE_LITTLE_ENDIAN && - DEVICE_HOST_ENDIAN != DEVICE_BIG_ENDIAN); - -#if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN - /* Swap if non-host endianness or native (target) endianness */ - return (end == DEVICE_HOST_ENDIAN) ? 0 : MO_BSWAP; -#else - const int non_host_endianness = - DEVICE_LITTLE_ENDIAN ^ DEVICE_BIG_ENDIAN ^ DEVICE_HOST_ENDIAN; - - /* In this case, native (target) endianness needs no swap. */ - return (end == non_host_endianness) ? MO_BSWAP : 0; -#endif -} -#endif /* COMPILING_PER_TARGET */ - -/* - * Inhibit technologies that require discarding of pages in RAM blocks, e.g., - * to manage the actual amount of memory consumed by the VM (then, the memory - * provided by RAM blocks might be bigger than the desired memory consumption). - * This *must* be set if: - * - Discarding parts of a RAM blocks does not result in the change being - * reflected in the VM and the pages getting freed. - * - All memory in RAM blocks is pinned or duplicated, invaldiating any previous - * discards blindly. - * - Discarding parts of a RAM blocks will result in integrity issues (e.g., - * encrypted VMs). - * Technologies that only temporarily pin the current working set of a - * driver are fine, because we don't expect such pages to be discarded - * (esp. based on guest action like balloon inflation). - * - * This is *not* to be used to protect from concurrent discards (esp., - * postcopy). - * - * Returns 0 if successful. Returns -EBUSY if a technology that relies on - * discards to work reliably is active. - */ -int ram_block_discard_disable(bool state); - -/* - * See ram_block_discard_disable(): only disable uncoordinated discards, - * keeping coordinated discards (via the RamDiscardManager) enabled. - */ -int ram_block_uncoordinated_discard_disable(bool state); - -/* - * Inhibit technologies that disable discarding of pages in RAM blocks. - * - * Returns 0 if successful. Returns -EBUSY if discards are already set to - * broken. - */ -int ram_block_discard_require(bool state); - -/* - * See ram_block_discard_require(): only inhibit technologies that disable - * uncoordinated discarding of pages in RAM blocks, allowing co-existence with - * technologies that only inhibit uncoordinated discards (via the - * RamDiscardManager). - */ -int ram_block_coordinated_discard_require(bool state); - -/* - * Test if any discarding of memory in ram blocks is disabled. - */ -bool ram_block_discard_is_disabled(void); - -/* - * Test if any discarding of memory in ram blocks is required to work reliably. - */ -bool ram_block_discard_is_required(void); - -#endif - -#endif diff --git a/include/exec/memory_ldst.h.inc b/include/exec/memory_ldst.h.inc index 92ad74e..7270235 100644 --- a/include/exec/memory_ldst.h.inc +++ b/include/exec/memory_ldst.h.inc @@ -19,7 +19,6 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ -#ifdef TARGET_ENDIANNESS uint16_t glue(address_space_lduw, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); uint32_t glue(address_space_ldl, SUFFIX)(ARG1_DECL, @@ -34,7 +33,6 @@ void glue(address_space_stl, SUFFIX)(ARG1_DECL, hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result); void glue(address_space_stq, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result); -#else uint8_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, hwaddr addr, MemTxAttrs attrs, MemTxResult *result); uint16_t glue(address_space_lduw_le, SUFFIX)(ARG1_DECL, @@ -63,9 +61,7 @@ void glue(address_space_stq_le, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result); void glue(address_space_stq_be, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result); -#endif #undef ARG1_DECL #undef ARG1 #undef SUFFIX -#undef TARGET_ENDIANNESS diff --git a/include/exec/memory_ldst_phys.h.inc b/include/exec/memory_ldst_phys.h.inc index ecd6786..db67de7 100644 --- a/include/exec/memory_ldst_phys.h.inc +++ b/include/exec/memory_ldst_phys.h.inc @@ -19,7 +19,6 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ -#ifdef TARGET_ENDIANNESS static inline uint16_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_lduw, SUFFIX)(ARG1, addr, @@ -55,7 +54,7 @@ static inline void glue(stq_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t val) glue(address_space_stq, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } -#else + static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr) { return glue(address_space_ldub, SUFFIX)(ARG1, addr, @@ -139,9 +138,7 @@ static inline void glue(stq_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint64_t va glue(address_space_stq_be, SUFFIX)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); } -#endif #undef ARG1_DECL #undef ARG1 #undef SUFFIX -#undef TARGET_ENDIANNESS diff --git a/include/exec/mmap-lock.h b/include/exec/mmap-lock.h new file mode 100644 index 0000000..50ffdab --- /dev/null +++ b/include/exec/mmap-lock.h @@ -0,0 +1,33 @@ +/* + * QEMU user-only mmap lock, with stubs for system mode + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef EXEC_MMAP_LOCK_H +#define EXEC_MMAP_LOCK_H + +#ifdef CONFIG_USER_ONLY + +void TSA_NO_TSA mmap_lock(void); +void TSA_NO_TSA mmap_unlock(void); +bool have_mmap_lock(void); + +static inline void mmap_unlock_guard(void *unused) +{ + mmap_unlock(); +} + +#define WITH_MMAP_LOCK_GUARD() \ + for (int _mmap_lock_iter __attribute__((cleanup(mmap_unlock_guard))) \ + = (mmap_lock(), 0); _mmap_lock_iter == 0; _mmap_lock_iter = 1) + +#else + +static inline void mmap_lock(void) {} +static inline void mmap_unlock(void) {} +#define WITH_MMAP_LOCK_GUARD() + +#endif /* CONFIG_USER_ONLY */ +#endif /* EXEC_MMAP_LOCK_H */ diff --git a/include/exec/page-vary.h b/include/exec/page-vary.h index 54ddde3..101c259 100644 --- a/include/exec/page-vary.h +++ b/include/exec/page-vary.h @@ -49,4 +49,13 @@ bool set_preferred_target_page_bits(int bits); */ void finalize_target_page_bits(void); +/** + * migration_legacy_page_bits + * + * For migration compatibility with qemu v2.9, prior to the introduction + * of the configuration/target-page-bits section, return the value of + * TARGET_PAGE_BITS that the target had then. + */ +int migration_legacy_page_bits(void); + #endif /* EXEC_PAGE_VARY_H */ diff --git a/include/exec/poison.h b/include/exec/poison.h index 792a83f..a779adb 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -11,7 +11,6 @@ #pragma GCC poison TARGET_AARCH64 #pragma GCC poison TARGET_ALPHA #pragma GCC poison TARGET_ARM -#pragma GCC poison TARGET_CRIS #pragma GCC poison TARGET_HEXAGON #pragma GCC poison TARGET_HPPA #pragma GCC poison TARGET_LOONGARCH64 @@ -36,35 +35,17 @@ #pragma GCC poison TARGET_HAS_BFLT #pragma GCC poison TARGET_NAME -#pragma GCC poison TARGET_SUPPORTS_MTTCG #pragma GCC poison TARGET_BIG_ENDIAN -#pragma GCC poison BSWAP_NEEDED +#pragma GCC poison TCG_GUEST_DEFAULT_MO #pragma GCC poison TARGET_LONG_BITS #pragma GCC poison TARGET_FMT_lx #pragma GCC poison TARGET_FMT_ld #pragma GCC poison TARGET_FMT_lu -#pragma GCC poison TARGET_PAGE_SIZE -#pragma GCC poison TARGET_PAGE_MASK -#pragma GCC poison TARGET_PAGE_BITS -#pragma GCC poison TARGET_PAGE_ALIGN - -#pragma GCC poison CPU_INTERRUPT_HARD -#pragma GCC poison CPU_INTERRUPT_EXITTB -#pragma GCC poison CPU_INTERRUPT_HALT -#pragma GCC poison CPU_INTERRUPT_DEBUG -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_0 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_1 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_2 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_3 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_4 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_0 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_1 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_2 +#pragma GCC poison TARGET_PHYS_ADDR_SPACE_BITS #pragma GCC poison CONFIG_ALPHA_DIS -#pragma GCC poison CONFIG_CRIS_DIS #pragma GCC poison CONFIG_HPPA_DIS #pragma GCC poison CONFIG_I386_DIS #pragma GCC poison CONFIG_HEXAGON_DIS @@ -85,4 +66,11 @@ #pragma GCC poison CONFIG_WHPX #pragma GCC poison CONFIG_XEN +#ifndef COMPILING_SYSTEM_VS_USER +#pragma GCC poison CONFIG_USER_ONLY +#pragma GCC poison CONFIG_SOFTMMU +#endif + +#pragma GCC poison KVM_HAVE_MCE_INJECTION + #endif diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h deleted file mode 100644 index 891c44c..0000000 --- a/include/exec/ram_addr.h +++ /dev/null @@ -1,552 +0,0 @@ -/* - * Declarations for cpu physical memory functions - * - * Copyright 2011 Red Hat, Inc. and/or its affiliates - * - * Authors: - * Avi Kivity <avi@redhat.com> - * - * This work is licensed under the terms of the GNU GPL, version 2 or - * later. See the COPYING file in the top-level directory. - * - */ - -/* - * This header is for use by exec.c and memory.c ONLY. Do not include it. - * The functions declared here will be removed soon. - */ - -#ifndef RAM_ADDR_H -#define RAM_ADDR_H - -#ifndef CONFIG_USER_ONLY -#include "cpu.h" -#include "sysemu/xen.h" -#include "sysemu/tcg.h" -#include "exec/ramlist.h" -#include "exec/ramblock.h" -#include "exec/exec-all.h" -#include "qemu/rcu.h" - -extern uint64_t total_dirty_pages; - -/** - * clear_bmap_size: calculate clear bitmap size - * - * @pages: number of guest pages - * @shift: guest page number shift - * - * Returns: number of bits for the clear bitmap - */ -static inline long clear_bmap_size(uint64_t pages, uint8_t shift) -{ - return DIV_ROUND_UP(pages, 1UL << shift); -} - -/** - * clear_bmap_set: set clear bitmap for the page range. Must be with - * bitmap_mutex held. - * - * @rb: the ramblock to operate on - * @start: the start page number - * @size: number of pages to set in the bitmap - * - * Returns: None - */ -static inline void clear_bmap_set(RAMBlock *rb, uint64_t start, - uint64_t npages) -{ - uint8_t shift = rb->clear_bmap_shift; - - bitmap_set(rb->clear_bmap, start >> shift, clear_bmap_size(npages, shift)); -} - -/** - * clear_bmap_test_and_clear: test clear bitmap for the page, clear if set. - * Must be with bitmap_mutex held. - * - * @rb: the ramblock to operate on - * @page: the page number to check - * - * Returns: true if the bit was set, false otherwise - */ -static inline bool clear_bmap_test_and_clear(RAMBlock *rb, uint64_t page) -{ - uint8_t shift = rb->clear_bmap_shift; - - return bitmap_test_and_clear(rb->clear_bmap, page >> shift, 1); -} - -static inline bool offset_in_ramblock(RAMBlock *b, ram_addr_t offset) -{ - return (b && b->host && offset < b->used_length) ? true : false; -} - -static inline void *ramblock_ptr(RAMBlock *block, ram_addr_t offset) -{ - assert(offset_in_ramblock(block, offset)); - return (char *)block->host + offset; -} - -static inline unsigned long int ramblock_recv_bitmap_offset(void *host_addr, - RAMBlock *rb) -{ - uint64_t host_addr_offset = - (uint64_t)(uintptr_t)(host_addr - (void *)rb->host); - return host_addr_offset >> TARGET_PAGE_BITS; -} - -bool ramblock_is_pmem(RAMBlock *rb); - -long qemu_minrampagesize(void); -long qemu_maxrampagesize(void); - -/** - * qemu_ram_alloc_from_file, - * qemu_ram_alloc_from_fd: Allocate a ram block from the specified backing - * file or device - * - * Parameters: - * @size: the size in bytes of the ram block - * @mr: the memory region where the ram block is - * @ram_flags: RamBlock flags. Supported flags: RAM_SHARED, RAM_PMEM, - * RAM_NORESERVE, RAM_PROTECTED, RAM_NAMED_FILE, RAM_READONLY, - * RAM_READONLY_FD, RAM_GUEST_MEMFD - * @mem_path or @fd: specify the backing file or device - * @offset: Offset into target file - * @errp: pointer to Error*, to store an error if it happens - * - * Return: - * On success, return a pointer to the ram block. - * On failure, return NULL. - */ -RAMBlock *qemu_ram_alloc_from_file(ram_addr_t size, MemoryRegion *mr, - uint32_t ram_flags, const char *mem_path, - off_t offset, Error **errp); -RAMBlock *qemu_ram_alloc_from_fd(ram_addr_t size, MemoryRegion *mr, - uint32_t ram_flags, int fd, off_t offset, - Error **errp); - -RAMBlock *qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, - MemoryRegion *mr, Error **errp); -RAMBlock *qemu_ram_alloc(ram_addr_t size, uint32_t ram_flags, MemoryRegion *mr, - Error **errp); -RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t max_size, - void (*resized)(const char*, - uint64_t length, - void *host), - MemoryRegion *mr, Error **errp); -void qemu_ram_free(RAMBlock *block); - -int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp); - -void qemu_ram_msync(RAMBlock *block, ram_addr_t start, ram_addr_t length); - -/* Clear whole block of mem */ -static inline void qemu_ram_block_writeback(RAMBlock *block) -{ - qemu_ram_msync(block, 0, block->used_length); -} - -#define DIRTY_CLIENTS_ALL ((1 << DIRTY_MEMORY_NUM) - 1) -#define DIRTY_CLIENTS_NOCODE (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_CODE)) - -static inline bool cpu_physical_memory_get_dirty(ram_addr_t start, - ram_addr_t length, - unsigned client) -{ - DirtyMemoryBlocks *blocks; - unsigned long end, page; - unsigned long idx, offset, base; - bool dirty = false; - - assert(client < DIRTY_MEMORY_NUM); - - end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS; - page = start >> TARGET_PAGE_BITS; - - WITH_RCU_READ_LOCK_GUARD() { - blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]); - - idx = page / DIRTY_MEMORY_BLOCK_SIZE; - offset = page % DIRTY_MEMORY_BLOCK_SIZE; - base = page - offset; - while (page < end) { - unsigned long next = MIN(end, base + DIRTY_MEMORY_BLOCK_SIZE); - unsigned long num = next - base; - unsigned long found = find_next_bit(blocks->blocks[idx], - num, offset); - if (found < num) { - dirty = true; - break; - } - - page = next; - idx++; - offset = 0; - base += DIRTY_MEMORY_BLOCK_SIZE; - } - } - - return dirty; -} - -static inline bool cpu_physical_memory_all_dirty(ram_addr_t start, - ram_addr_t length, - unsigned client) -{ - DirtyMemoryBlocks *blocks; - unsigned long end, page; - unsigned long idx, offset, base; - bool dirty = true; - - assert(client < DIRTY_MEMORY_NUM); - - end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS; - page = start >> TARGET_PAGE_BITS; - - RCU_READ_LOCK_GUARD(); - - blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]); - - idx = page / DIRTY_MEMORY_BLOCK_SIZE; - offset = page % DIRTY_MEMORY_BLOCK_SIZE; - base = page - offset; - while (page < end) { - unsigned long next = MIN(end, base + DIRTY_MEMORY_BLOCK_SIZE); - unsigned long num = next - base; - unsigned long found = find_next_zero_bit(blocks->blocks[idx], num, offset); - if (found < num) { - dirty = false; - break; - } - - page = next; - idx++; - offset = 0; - base += DIRTY_MEMORY_BLOCK_SIZE; - } - - return dirty; -} - -static inline bool cpu_physical_memory_get_dirty_flag(ram_addr_t addr, - unsigned client) -{ - return cpu_physical_memory_get_dirty(addr, 1, client); -} - -static inline bool cpu_physical_memory_is_clean(ram_addr_t addr) -{ - bool vga = cpu_physical_memory_get_dirty_flag(addr, DIRTY_MEMORY_VGA); - bool code = cpu_physical_memory_get_dirty_flag(addr, DIRTY_MEMORY_CODE); - bool migration = - cpu_physical_memory_get_dirty_flag(addr, DIRTY_MEMORY_MIGRATION); - return !(vga && code && migration); -} - -static inline uint8_t cpu_physical_memory_range_includes_clean(ram_addr_t start, - ram_addr_t length, - uint8_t mask) -{ - uint8_t ret = 0; - - if (mask & (1 << DIRTY_MEMORY_VGA) && - !cpu_physical_memory_all_dirty(start, length, DIRTY_MEMORY_VGA)) { - ret |= (1 << DIRTY_MEMORY_VGA); - } - if (mask & (1 << DIRTY_MEMORY_CODE) && - !cpu_physical_memory_all_dirty(start, length, DIRTY_MEMORY_CODE)) { - ret |= (1 << DIRTY_MEMORY_CODE); - } - if (mask & (1 << DIRTY_MEMORY_MIGRATION) && - !cpu_physical_memory_all_dirty(start, length, DIRTY_MEMORY_MIGRATION)) { - ret |= (1 << DIRTY_MEMORY_MIGRATION); - } - return ret; -} - -static inline void cpu_physical_memory_set_dirty_flag(ram_addr_t addr, - unsigned client) -{ - unsigned long page, idx, offset; - DirtyMemoryBlocks *blocks; - - assert(client < DIRTY_MEMORY_NUM); - - page = addr >> TARGET_PAGE_BITS; - idx = page / DIRTY_MEMORY_BLOCK_SIZE; - offset = page % DIRTY_MEMORY_BLOCK_SIZE; - - RCU_READ_LOCK_GUARD(); - - blocks = qatomic_rcu_read(&ram_list.dirty_memory[client]); - - set_bit_atomic(offset, blocks->blocks[idx]); -} - -static inline void cpu_physical_memory_set_dirty_range(ram_addr_t start, - ram_addr_t length, - uint8_t mask) -{ - DirtyMemoryBlocks *blocks[DIRTY_MEMORY_NUM]; - unsigned long end, page; - unsigned long idx, offset, base; - int i; - - if (!mask && !xen_enabled()) { - return; - } - - end = TARGET_PAGE_ALIGN(start + length) >> TARGET_PAGE_BITS; - page = start >> TARGET_PAGE_BITS; - - WITH_RCU_READ_LOCK_GUARD() { - for (i = 0; i < DIRTY_MEMORY_NUM; i++) { - blocks[i] = qatomic_rcu_read(&ram_list.dirty_memory[i]); - } - - idx = page / DIRTY_MEMORY_BLOCK_SIZE; - offset = page % DIRTY_MEMORY_BLOCK_SIZE; - base = page - offset; - while (page < end) { - unsigned long next = MIN(end, base + DIRTY_MEMORY_BLOCK_SIZE); - - if (likely(mask & (1 << DIRTY_MEMORY_MIGRATION))) { - bitmap_set_atomic(blocks[DIRTY_MEMORY_MIGRATION]->blocks[idx], - offset, next - page); - } - if (unlikely(mask & (1 << DIRTY_MEMORY_VGA))) { - bitmap_set_atomic(blocks[DIRTY_MEMORY_VGA]->blocks[idx], - offset, next - page); - } - if (unlikely(mask & (1 << DIRTY_MEMORY_CODE))) { - bitmap_set_atomic(blocks[DIRTY_MEMORY_CODE]->blocks[idx], - offset, next - page); - } - - page = next; - idx++; - offset = 0; - base += DIRTY_MEMORY_BLOCK_SIZE; - } - } - - xen_hvm_modified_memory(start, length); -} - -#if !defined(_WIN32) - -/* - * Contrary to cpu_physical_memory_sync_dirty_bitmap() this function returns - * the number of dirty pages in @bitmap passed as argument. On the other hand, - * cpu_physical_memory_sync_dirty_bitmap() returns newly dirtied pages that - * weren't set in the global migration bitmap. - */ -static inline -uint64_t cpu_physical_memory_set_dirty_lebitmap(unsigned long *bitmap, - ram_addr_t start, - ram_addr_t pages) -{ - unsigned long i, j; - unsigned long page_number, c, nbits; - hwaddr addr; - ram_addr_t ram_addr; - uint64_t num_dirty = 0; - unsigned long len = (pages + HOST_LONG_BITS - 1) / HOST_LONG_BITS; - unsigned long hpratio = qemu_real_host_page_size() / TARGET_PAGE_SIZE; - unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS); - - /* start address is aligned at the start of a word? */ - if ((((page * BITS_PER_LONG) << TARGET_PAGE_BITS) == start) && - (hpratio == 1)) { - unsigned long **blocks[DIRTY_MEMORY_NUM]; - unsigned long idx; - unsigned long offset; - long k; - long nr = BITS_TO_LONGS(pages); - - idx = (start >> TARGET_PAGE_BITS) / DIRTY_MEMORY_BLOCK_SIZE; - offset = BIT_WORD((start >> TARGET_PAGE_BITS) % - DIRTY_MEMORY_BLOCK_SIZE); - - WITH_RCU_READ_LOCK_GUARD() { - for (i = 0; i < DIRTY_MEMORY_NUM; i++) { - blocks[i] = - qatomic_rcu_read(&ram_list.dirty_memory[i])->blocks; - } - - for (k = 0; k < nr; k++) { - if (bitmap[k]) { - unsigned long temp = leul_to_cpu(bitmap[k]); - - nbits = ctpopl(temp); - qatomic_or(&blocks[DIRTY_MEMORY_VGA][idx][offset], temp); - - if (global_dirty_tracking) { - qatomic_or( - &blocks[DIRTY_MEMORY_MIGRATION][idx][offset], - temp); - if (unlikely( - global_dirty_tracking & GLOBAL_DIRTY_DIRTY_RATE)) { - total_dirty_pages += nbits; - } - } - - num_dirty += nbits; - - if (tcg_enabled()) { - qatomic_or(&blocks[DIRTY_MEMORY_CODE][idx][offset], - temp); - } - } - - if (++offset >= BITS_TO_LONGS(DIRTY_MEMORY_BLOCK_SIZE)) { - offset = 0; - idx++; - } - } - } - - xen_hvm_modified_memory(start, pages << TARGET_PAGE_BITS); - } else { - uint8_t clients = tcg_enabled() ? DIRTY_CLIENTS_ALL : DIRTY_CLIENTS_NOCODE; - - if (!global_dirty_tracking) { - clients &= ~(1 << DIRTY_MEMORY_MIGRATION); - } - - /* - * bitmap-traveling is faster than memory-traveling (for addr...) - * especially when most of the memory is not dirty. - */ - for (i = 0; i < len; i++) { - if (bitmap[i] != 0) { - c = leul_to_cpu(bitmap[i]); - nbits = ctpopl(c); - if (unlikely(global_dirty_tracking & GLOBAL_DIRTY_DIRTY_RATE)) { - total_dirty_pages += nbits; - } - num_dirty += nbits; - do { - j = ctzl(c); - c &= ~(1ul << j); - page_number = (i * HOST_LONG_BITS + j) * hpratio; - addr = page_number * TARGET_PAGE_SIZE; - ram_addr = start + addr; - cpu_physical_memory_set_dirty_range(ram_addr, - TARGET_PAGE_SIZE * hpratio, clients); - } while (c != 0); - } - } - } - - return num_dirty; -} -#endif /* not _WIN32 */ - -static inline void cpu_physical_memory_dirty_bits_cleared(ram_addr_t start, - ram_addr_t length) -{ - if (tcg_enabled()) { - tlb_reset_dirty_range_all(start, length); - } - -} -bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start, - ram_addr_t length, - unsigned client); - -DirtyBitmapSnapshot *cpu_physical_memory_snapshot_and_clear_dirty - (MemoryRegion *mr, hwaddr offset, hwaddr length, unsigned client); - -bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap, - ram_addr_t start, - ram_addr_t length); - -static inline void cpu_physical_memory_clear_dirty_range(ram_addr_t start, - ram_addr_t length) -{ - cpu_physical_memory_test_and_clear_dirty(start, length, DIRTY_MEMORY_MIGRATION); - cpu_physical_memory_test_and_clear_dirty(start, length, DIRTY_MEMORY_VGA); - cpu_physical_memory_test_and_clear_dirty(start, length, DIRTY_MEMORY_CODE); -} - - -/* Called with RCU critical section */ -static inline -uint64_t cpu_physical_memory_sync_dirty_bitmap(RAMBlock *rb, - ram_addr_t start, - ram_addr_t length) -{ - ram_addr_t addr; - unsigned long word = BIT_WORD((start + rb->offset) >> TARGET_PAGE_BITS); - uint64_t num_dirty = 0; - unsigned long *dest = rb->bmap; - - /* start address and length is aligned at the start of a word? */ - if (((word * BITS_PER_LONG) << TARGET_PAGE_BITS) == - (start + rb->offset) && - !(length & ((BITS_PER_LONG << TARGET_PAGE_BITS) - 1))) { - int k; - int nr = BITS_TO_LONGS(length >> TARGET_PAGE_BITS); - unsigned long * const *src; - unsigned long idx = (word * BITS_PER_LONG) / DIRTY_MEMORY_BLOCK_SIZE; - unsigned long offset = BIT_WORD((word * BITS_PER_LONG) % - DIRTY_MEMORY_BLOCK_SIZE); - unsigned long page = BIT_WORD(start >> TARGET_PAGE_BITS); - - src = qatomic_rcu_read( - &ram_list.dirty_memory[DIRTY_MEMORY_MIGRATION])->blocks; - - for (k = page; k < page + nr; k++) { - if (src[idx][offset]) { - unsigned long bits = qatomic_xchg(&src[idx][offset], 0); - unsigned long new_dirty; - new_dirty = ~dest[k]; - dest[k] |= bits; - new_dirty &= bits; - num_dirty += ctpopl(new_dirty); - } - - if (++offset >= BITS_TO_LONGS(DIRTY_MEMORY_BLOCK_SIZE)) { - offset = 0; - idx++; - } - } - if (num_dirty) { - cpu_physical_memory_dirty_bits_cleared(start, length); - } - - if (rb->clear_bmap) { - /* - * Postpone the dirty bitmap clear to the point before we - * really send the pages, also we will split the clear - * dirty procedure into smaller chunks. - */ - clear_bmap_set(rb, start >> TARGET_PAGE_BITS, - length >> TARGET_PAGE_BITS); - } else { - /* Slow path - still do that in a huge chunk */ - memory_region_clear_dirty_bitmap(rb->mr, start, length); - } - } else { - ram_addr_t offset = rb->offset; - - for (addr = 0; addr < length; addr += TARGET_PAGE_SIZE) { - if (cpu_physical_memory_test_and_clear_dirty( - start + addr + offset, - TARGET_PAGE_SIZE, - DIRTY_MEMORY_MIGRATION)) { - long k = (start + addr) >> TARGET_PAGE_BITS; - if (!test_and_set_bit(k, dest)) { - num_dirty++; - } - } - } - } - - return num_dirty; -} -#endif -#endif diff --git a/include/exec/ramblock.h b/include/exec/ramblock.h deleted file mode 100644 index 0babd10..0000000 --- a/include/exec/ramblock.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Declarations for cpu physical memory functions - * - * Copyright 2011 Red Hat, Inc. and/or its affiliates - * - * Authors: - * Avi Kivity <avi@redhat.com> - * - * This work is licensed under the terms of the GNU GPL, version 2 or - * later. See the COPYING file in the top-level directory. - * - */ - -/* - * This header is for use by exec.c and memory.c ONLY. Do not include it. - * The functions declared here will be removed soon. - */ - -#ifndef QEMU_EXEC_RAMBLOCK_H -#define QEMU_EXEC_RAMBLOCK_H - -#ifndef CONFIG_USER_ONLY -#include "cpu-common.h" -#include "qemu/rcu.h" -#include "exec/ramlist.h" - -struct RAMBlock { - struct rcu_head rcu; - struct MemoryRegion *mr; - uint8_t *host; - uint8_t *colo_cache; /* For colo, VM's ram cache */ - ram_addr_t offset; - ram_addr_t used_length; - ram_addr_t max_length; - void (*resized)(const char*, uint64_t length, void *host); - uint32_t flags; - /* Protected by the BQL. */ - char idstr[256]; - /* RCU-enabled, writes protected by the ramlist lock */ - QLIST_ENTRY(RAMBlock) next; - QLIST_HEAD(, RAMBlockNotifier) ramblock_notifiers; - int fd; - uint64_t fd_offset; - int guest_memfd; - size_t page_size; - /* dirty bitmap used during migration */ - unsigned long *bmap; - - /* - * Below fields are only used by mapped-ram migration - */ - /* bitmap of pages present in the migration file */ - unsigned long *file_bmap; - /* - * offset in the file pages belonging to this ramblock are saved, - * used only during migration to a file. - */ - off_t bitmap_offset; - uint64_t pages_offset; - - /* Bitmap of already received pages. Only used on destination side. */ - unsigned long *receivedmap; - - /* - * bitmap to track already cleared dirty bitmap. When the bit is - * set, it means the corresponding memory chunk needs a log-clear. - * Set this up to non-NULL to enable the capability to postpone - * and split clearing of dirty bitmap on the remote node (e.g., - * KVM). The bitmap will be set only when doing global sync. - * - * It is only used during src side of ram migration, and it is - * protected by the global ram_state.bitmap_mutex. - * - * NOTE: this bitmap is different comparing to the other bitmaps - * in that one bit can represent multiple guest pages (which is - * decided by the `clear_bmap_shift' variable below). On - * destination side, this should always be NULL, and the variable - * `clear_bmap_shift' is meaningless. - */ - unsigned long *clear_bmap; - uint8_t clear_bmap_shift; - - /* - * RAM block length that corresponds to the used_length on the migration - * source (after RAM block sizes were synchronized). Especially, after - * starting to run the guest, used_length and postcopy_length can differ. - * Used to register/unregister uffd handlers and as the size of the received - * bitmap. Receiving any page beyond this length will bail out, as it - * could not have been valid on the source. - */ - ram_addr_t postcopy_length; -}; -#endif -#endif diff --git a/include/exec/ramlist.h b/include/exec/ramlist.h index 2ad2a81..d9cfe53 100644 --- a/include/exec/ramlist.h +++ b/include/exec/ramlist.h @@ -50,6 +50,7 @@ typedef struct RAMList { /* RCU-enabled, writes protected by the ramlist lock. */ QLIST_HEAD(, RAMBlock) blocks; DirtyMemoryBlocks *dirty_memory[DIRTY_MEMORY_NUM]; + unsigned int num_dirty_blocks; uint32_t version; QLIST_HEAD(, RAMBlockNotifier) ramblock_notifiers; } RAMList; diff --git a/include/exec/target_page.h b/include/exec/target_page.h index 98ffbb5..ca0ebbc 100644 --- a/include/exec/target_page.h +++ b/include/exec/target_page.h @@ -14,10 +14,54 @@ #ifndef EXEC_TARGET_PAGE_H #define EXEC_TARGET_PAGE_H -size_t qemu_target_page_size(void); -int qemu_target_page_mask(void); -int qemu_target_page_bits(void); -int qemu_target_page_bits_min(void); +/* + * If compiling per-target, get the real values. + * For generic code, reuse the mechanism for variable page size. + */ +#ifdef COMPILING_PER_TARGET +#include "cpu-param.h" +#include "exec/target_long.h" +#define TARGET_PAGE_TYPE target_long +#else +#define TARGET_PAGE_BITS_VARY +#define TARGET_PAGE_TYPE int +#endif + +#ifdef TARGET_PAGE_BITS_VARY +# include "exec/page-vary.h" +extern const TargetPageBits target_page; +# ifdef CONFIG_DEBUG_TCG +# define TARGET_PAGE_BITS ({ assert(target_page.decided); \ + target_page.bits; }) +# define TARGET_PAGE_MASK ({ assert(target_page.decided); \ + (TARGET_PAGE_TYPE)target_page.mask; }) +# else +# define TARGET_PAGE_BITS target_page.bits +# define TARGET_PAGE_MASK ((TARGET_PAGE_TYPE)target_page.mask) +# endif +# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) +#else +# define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) +# define TARGET_PAGE_MASK ((TARGET_PAGE_TYPE)-1 << TARGET_PAGE_BITS) +#endif + +#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) + +static inline size_t qemu_target_page_size(void) +{ + return TARGET_PAGE_SIZE; +} + +static inline int qemu_target_page_mask(void) +{ + return TARGET_PAGE_MASK; +} + +static inline int qemu_target_page_bits(void) +{ + return TARGET_PAGE_BITS; +} size_t qemu_target_pages_to_MiB(size_t pages); + #endif diff --git a/include/exec/tlb-common.h b/include/exec/tlb-common.h index dc5a5fa..03b5a8f 100644 --- a/include/exec/tlb-common.h +++ b/include/exec/tlb-common.h @@ -19,14 +19,14 @@ #ifndef EXEC_TLB_COMMON_H #define EXEC_TLB_COMMON_H 1 -#define CPU_TLB_ENTRY_BITS 5 +#define CPU_TLB_ENTRY_BITS (HOST_LONG_BITS == 32 ? 4 : 5) /* Minimalized TLB entry for use by TCG fast path. */ typedef union CPUTLBEntry { struct { - uint64_t addr_read; - uint64_t addr_write; - uint64_t addr_code; + uintptr_t addr_read; + uintptr_t addr_write; + uintptr_t addr_code; /* * Addend to virtual address to get host address. IO accesses * use the corresponding iotlb value. @@ -37,7 +37,7 @@ typedef union CPUTLBEntry { * Padding to get a power of two size, as well as index * access to addr_{read,write,code}. */ - uint64_t addr_idx[(1 << CPU_TLB_ENTRY_BITS) / sizeof(uint64_t)]; + uintptr_t addr_idx[(1 << CPU_TLB_ENTRY_BITS) / sizeof(uintptr_t)]; } CPUTLBEntry; QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS)); diff --git a/include/exec/tlb-flags.h b/include/exec/tlb-flags.h new file mode 100644 index 0000000..357e790 --- /dev/null +++ b/include/exec/tlb-flags.h @@ -0,0 +1,86 @@ +/* + * TLB flags definition + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ +#ifndef TLB_FLAGS_H +#define TLB_FLAGS_H + +/* + * Flags returned for lookup of a TLB virtual address. + */ + +#ifdef CONFIG_USER_ONLY + +/* + * Allow some level of source compatibility with softmmu. + * Invalid is set when the page does not have requested permissions. + * MMIO is set when we want the target helper to use the functional + * interface for load/store so that plugins see the access. + */ +#define TLB_INVALID_MASK (1 << 0) +#define TLB_MMIO (1 << 1) +#define TLB_WATCHPOINT 0 + +#else + +/* + * Flags stored in CPUTLBEntryFull.slow_flags[x]. + * TLB_FORCE_SLOW must be set in CPUTLBEntry.addr_idx[x]. + */ + +/* Set if TLB entry requires byte swap. */ +#define TLB_BSWAP (1 << 0) +/* Set if TLB entry contains a watchpoint. */ +#define TLB_WATCHPOINT (1 << 1) +/* Set if TLB entry requires aligned accesses. */ +#define TLB_CHECK_ALIGNED (1 << 2) +/* Set if TLB entry writes ignored. */ +#define TLB_DISCARD_WRITE (1 << 3) +/* Set if TLB entry is an IO callback. */ +#define TLB_MMIO (1 << 4) + +#define TLB_SLOW_FLAGS_MASK \ + (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED | \ + TLB_DISCARD_WRITE | TLB_MMIO) + +/* + * Flags stored in CPUTLBEntry.addr_idx[x]. + * These must be above the largest alignment (64 bytes), + * and below the smallest page size (1024 bytes). + * This leaves bits [9:6] available for use. + */ + +/* Zero if TLB entry is valid. */ +#define TLB_INVALID_MASK (1 << 6) +/* Set if TLB entry references a clean RAM page. */ +#define TLB_NOTDIRTY (1 << 7) +/* Set if the slow path must be used; more flags in CPUTLBEntryFull. */ +#define TLB_FORCE_SLOW (1 << 8) + +/* + * Use this mask to check interception with an alignment mask + * in a TCG backend. + */ +#define TLB_FLAGS_MASK \ + (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_FORCE_SLOW) + +/* The two sets of flags must not overlap. */ +QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK); + +#endif /* !CONFIG_USER_ONLY */ + +#endif /* TLB_FLAGS_H */ diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h deleted file mode 100644 index 85c9460..0000000 --- a/include/exec/translate-all.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Translated block handling - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ -#ifndef TRANSLATE_ALL_H -#define TRANSLATE_ALL_H - -#include "exec/exec-all.h" - - -/* translate-all.c */ -void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); - -#ifdef CONFIG_USER_ONLY -void page_protect(tb_page_addr_t page_addr); -int page_unprotect(target_ulong address, uintptr_t pc); -#endif - -#endif /* TRANSLATE_ALL_H */ diff --git a/include/exec/translation-block.h b/include/exec/translation-block.h index a6d1af6..cdce399 100644 --- a/include/exec/translation-block.h +++ b/include/exec/translation-block.h @@ -7,10 +7,13 @@ #ifndef EXEC_TRANSLATION_BLOCK_H #define EXEC_TRANSLATION_BLOCK_H +#include "qemu/atomic.h" #include "qemu/thread.h" #include "exec/cpu-common.h" +#include "exec/vaddr.h" #ifdef CONFIG_USER_ONLY #include "qemu/interval-tree.h" +#include "exec/target_page.h" #endif /* @@ -152,4 +155,60 @@ static inline uint32_t tb_cflags(const TranslationBlock *tb) return qatomic_read(&tb->cflags); } +bool tcg_cflags_has(CPUState *cpu, uint32_t flags); +void tcg_cflags_set(CPUState *cpu, uint32_t flags); + +static inline tb_page_addr_t tb_page_addr0(const TranslationBlock *tb) +{ +#ifdef CONFIG_USER_ONLY + return tb->itree.start; +#else + return tb->page_addr[0]; +#endif +} + +static inline tb_page_addr_t tb_page_addr1(const TranslationBlock *tb) +{ +#ifdef CONFIG_USER_ONLY + tb_page_addr_t next = tb->itree.last & TARGET_PAGE_MASK; + return next == (tb->itree.start & TARGET_PAGE_MASK) ? -1 : next; +#else + return tb->page_addr[1]; +#endif +} + +static inline void tb_set_page_addr0(TranslationBlock *tb, + tb_page_addr_t addr) +{ +#ifdef CONFIG_USER_ONLY + tb->itree.start = addr; + /* + * To begin, we record an interval of one byte. When the translation + * loop encounters a second page, the interval will be extended to + * include the first byte of the second page, which is sufficient to + * allow tb_page_addr1() above to work properly. The final corrected + * interval will be set by tb_page_add() from tb->size before the + * node is added to the interval tree. + */ + tb->itree.last = addr; +#else + tb->page_addr[0] = addr; +#endif +} + +static inline void tb_set_page_addr1(TranslationBlock *tb, + tb_page_addr_t addr) +{ +#ifdef CONFIG_USER_ONLY + /* Extend the interval to the first byte of the second page. See above. */ + tb->itree.last = addr; +#else + tb->page_addr[1] = addr; +#endif +} + +/* TranslationBlock invalidate API */ +void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start, + tb_page_addr_t last); + #endif /* EXEC_TRANSLATION_BLOCK_H */ diff --git a/include/exec/translator.h b/include/exec/translator.h index 25004df..3c32655 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -18,24 +18,10 @@ * member in your target-specific DisasContext. */ -#include "qemu/bswap.h" +#include "exec/memop.h" #include "exec/vaddr.h" /** - * gen_intermediate_code - * @cpu: cpu context - * @tb: translation block - * @max_insns: max number of instructions to translate - * @pc: guest virtual program counter address - * @host_pc: host physical program counter address - * - * This function must be provided by the target, which should create - * the target-specific DisasContext, and then invoke translator_loop. - */ -void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns, - vaddr pc, void *host_pc); - -/** * DisasJumpType: * @DISAS_NEXT: Next instruction in program order. * @DISAS_TOO_MANY: Too many instructions translated. @@ -71,7 +57,6 @@ typedef enum DisasJumpType { * @is_jmp: What instruction to disassemble next. * @num_insns: Number of translated instructions (including current). * @max_insns: Maximum number of instructions to be translated in this TB. - * @singlestep_enabled: "Hardware" single stepping enabled. * @plugin_enabled: TCG plugin enabled in this TB. * @fake_insn: True if translator_fake_ldb used. * @insn_start: The last op emitted by the insn_start hook, @@ -86,9 +71,9 @@ struct DisasContextBase { DisasJumpType is_jmp; int num_insns; int max_insns; - bool singlestep_enabled; bool plugin_enabled; bool fake_insn; + uint8_t code_mmuidx; struct TCGOp *insn_start; void *host_addr[2]; @@ -196,42 +181,53 @@ bool translator_io_start(DisasContextBase *db); */ uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc); -uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc); -uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc); -uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc); +uint16_t translator_lduw_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian); +uint32_t translator_ldl_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian); +uint64_t translator_ldq_end(CPUArchState *env, DisasContextBase *db, + vaddr pc, MemOp endian); + +#ifdef COMPILING_PER_TARGET +static inline uint16_t +translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) +{ + return translator_lduw_end(env, db, pc, MO_TE); +} + +static inline uint32_t +translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) +{ + return translator_ldl_end(env, db, pc, MO_TE); +} + +static inline uint64_t +translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc) +{ + return translator_ldq_end(env, db, pc, MO_TE); +} static inline uint16_t translator_lduw_swap(CPUArchState *env, DisasContextBase *db, vaddr pc, bool do_swap) { - uint16_t ret = translator_lduw(env, db, pc); - if (do_swap) { - ret = bswap16(ret); - } - return ret; + return translator_lduw_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP)); } static inline uint32_t translator_ldl_swap(CPUArchState *env, DisasContextBase *db, vaddr pc, bool do_swap) { - uint32_t ret = translator_ldl(env, db, pc); - if (do_swap) { - ret = bswap32(ret); - } - return ret; + return translator_ldl_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP)); } static inline uint64_t translator_ldq_swap(CPUArchState *env, DisasContextBase *db, vaddr pc, bool do_swap) { - uint64_t ret = translator_ldq(env, db, pc); - if (do_swap) { - ret = bswap64(ret); - } - return ret; + return translator_ldq_end(env, db, pc, MO_TE ^ (do_swap * MO_BSWAP)); } +#endif /* COMPILING_PER_TARGET */ /** * translator_fake_ld - fake instruction load @@ -269,16 +265,15 @@ bool translator_st(const DisasContextBase *db, void *dest, */ size_t translator_st_len(const DisasContextBase *db); -#ifdef COMPILING_PER_TARGET -/* - * Return whether addr is on the same page as where disassembly started. +/** + * translator_is_same_page + * @db: disassembly context + * @addr: virtual address within TB + * + * Return whether @addr is on the same page as where disassembly started. * Translators can use this to enforce the rule that only single-insn * translation blocks are allowed to cross page boundaries. */ -static inline bool is_same_page(const DisasContextBase *db, vaddr addr) -{ - return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0; -} -#endif +bool translator_is_same_page(const DisasContextBase *db, vaddr addr); #endif /* EXEC__TRANSLATOR_H */ diff --git a/include/exec/tswap.h b/include/exec/tswap.h index b7a4191..49511f2 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -11,15 +11,16 @@ #include "qemu/bswap.h" /** - * target_words_bigendian: + * target_big_endian: * Returns true if the (default) endianness of the target is big endian, - * false otherwise. Note that in target-specific code, you can use - * TARGET_BIG_ENDIAN directly instead. On the other hand, common - * code should normally never need to know about the endianness of the - * target, so please do *not* use this function unless you know very well - * what you are doing! + * false otherwise. Common code should normally never need to know about the + * endianness of the target, so please do *not* use this function unless you + * know very well what you are doing! */ -bool target_words_bigendian(void); +bool target_big_endian(void); +#ifdef COMPILING_PER_TARGET +#define target_big_endian() TARGET_BIG_ENDIAN +#endif /* * If we're in target-specific code, we can hard-code the swapping @@ -28,7 +29,7 @@ bool target_words_bigendian(void); #ifdef COMPILING_PER_TARGET #define target_needs_bswap() (HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN) #else -#define target_needs_bswap() (target_words_bigendian() != HOST_BIG_ENDIAN) +#define target_needs_bswap() (HOST_BIG_ENDIAN != target_big_endian()) #endif /* COMPILING_PER_TARGET */ static inline uint16_t tswap16(uint16_t s) @@ -79,4 +80,74 @@ static inline void tswap64s(uint64_t *s) } } +/* Return ld{word}_{le,be}_p following target endianness. */ +#define LOAD_IMPL(word, args...) \ +do { \ + if (target_big_endian()) { \ + return glue(glue(ld, word), _be_p)(args); \ + } else { \ + return glue(glue(ld, word), _le_p)(args); \ + } \ +} while (0) + +static inline int lduw_p(const void *ptr) +{ + LOAD_IMPL(uw, ptr); +} + +static inline int ldsw_p(const void *ptr) +{ + LOAD_IMPL(sw, ptr); +} + +static inline int ldl_p(const void *ptr) +{ + LOAD_IMPL(l, ptr); +} + +static inline uint64_t ldq_p(const void *ptr) +{ + LOAD_IMPL(q, ptr); +} + +static inline uint64_t ldn_p(const void *ptr, int sz) +{ + LOAD_IMPL(n, ptr, sz); +} + +#undef LOAD_IMPL + +/* Call st{word}_{le,be}_p following target endianness. */ +#define STORE_IMPL(word, args...) \ +do { \ + if (target_big_endian()) { \ + glue(glue(st, word), _be_p)(args); \ + } else { \ + glue(glue(st, word), _le_p)(args); \ + } \ +} while (0) + + +static inline void stw_p(void *ptr, uint16_t v) +{ + STORE_IMPL(w, ptr, v); +} + +static inline void stl_p(void *ptr, uint32_t v) +{ + STORE_IMPL(l, ptr, v); +} + +static inline void stq_p(void *ptr, uint64_t v) +{ + STORE_IMPL(q, ptr, v); +} + +static inline void stn_p(void *ptr, int sz, uint64_t v) +{ + STORE_IMPL(n, ptr, sz, v); +} + +#undef STORE_IMPL + #endif /* TSWAP_H */ diff --git a/include/exec/vaddr.h b/include/exec/vaddr.h index b9844af..28bec63 100644 --- a/include/exec/vaddr.h +++ b/include/exec/vaddr.h @@ -6,13 +6,15 @@ /** * vaddr: * Type wide enough to contain any #target_ulong virtual address. + * We do not support 64-bit guest on 32-host and detect at configure time. + * Therefore, a host pointer width will always fit a guest pointer. */ -typedef uint64_t vaddr; -#define VADDR_PRId PRId64 -#define VADDR_PRIu PRIu64 -#define VADDR_PRIo PRIo64 -#define VADDR_PRIx PRIx64 -#define VADDR_PRIX PRIX64 -#define VADDR_MAX UINT64_MAX +typedef uintptr_t vaddr; +#define VADDR_PRId PRIdPTR +#define VADDR_PRIu PRIuPTR +#define VADDR_PRIo PRIoPTR +#define VADDR_PRIx PRIxPTR +#define VADDR_PRIX PRIXPTR +#define VADDR_MAX UINTPTR_MAX #endif diff --git a/include/exec/watchpoint.h b/include/exec/watchpoint.h new file mode 100644 index 0000000..4b66688 --- /dev/null +++ b/include/exec/watchpoint.h @@ -0,0 +1,41 @@ +/* + * CPU watchpoints + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef EXEC_WATCHPOINT_H +#define EXEC_WATCHPOINT_H + +#if defined(CONFIG_USER_ONLY) +static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, + int flags, CPUWatchpoint **watchpoint) +{ + return -ENOSYS; +} + +static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, + vaddr len, int flags) +{ + return -ENOSYS; +} + +static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu, + CPUWatchpoint *wp) +{ +} + +static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask) +{ +} +#else +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, + int flags, CPUWatchpoint **watchpoint); +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, + vaddr len, int flags); +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint); +void cpu_watchpoint_remove_all(CPUState *cpu, int mask); +#endif + +#endif /* EXEC_WATCHPOINT_H */ |