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-rw-r--r--hw/arm/aspeed.c2
-rw-r--r--hw/arm/aspeed_ast27x0.c2
-rw-r--r--hw/gpio/aspeed_gpio.c17
-rw-r--r--hw/misc/aspeed_sdmc.c7
-rw-r--r--hw/net/ftgmac100.c12
5 files changed, 35 insertions, 5 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 40dc0e4..53a4f66 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1379,6 +1379,8 @@ static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */
mc->default_ram_size = 1 * GiB;
aspeed_machine_class_init_cpus_defaults(mc);
+
+ mc->deprecation_reason = "Please use the similar 'rainier-bmc' machine";
};
static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index b6876b4..18e6a8b 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -211,6 +211,8 @@ static void aspeed_ram_capacity_write(void *opaque, hwaddr addr, uint64_t data,
ram_size = object_property_get_uint(OBJECT(&s->sdmc), "ram-size",
&error_abort);
+ assert(ram_size > 0);
+
/*
* Emulate ddr capacity hardware behavior.
* If writes the data to the address which is beyond the ram size,
diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c
index c1781e2..6474bb8 100644
--- a/hw/gpio/aspeed_gpio.c
+++ b/hw/gpio/aspeed_gpio.c
@@ -559,6 +559,12 @@ static uint64_t aspeed_gpio_read(void *opaque, hwaddr offset, uint32_t size)
return debounce_value;
}
+ if (idx >= agc->reg_table_count) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: idx 0x%" PRIx64 " out of bounds\n",
+ __func__, idx);
+ return 0;
+ }
+
reg = &agc->reg_table[idx];
if (reg->set_idx >= agc->nr_gpio_sets) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: no getter for offset 0x%"
@@ -785,6 +791,12 @@ static void aspeed_gpio_write(void *opaque, hwaddr offset, uint64_t data,
return;
}
+ if (idx >= agc->reg_table_count) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: idx 0x%" PRIx64 " out of bounds\n",
+ __func__, idx);
+ return;
+ }
+
reg = &agc->reg_table[idx];
if (reg->set_idx >= agc->nr_gpio_sets) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: no setter for offset 0x%"
@@ -1117,6 +1129,7 @@ static void aspeed_gpio_ast2400_class_init(ObjectClass *klass, void *data)
agc->nr_gpio_pins = 216;
agc->nr_gpio_sets = 7;
agc->reg_table = aspeed_3_3v_gpios;
+ agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
}
static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data)
@@ -1127,6 +1140,7 @@ static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data)
agc->nr_gpio_pins = 228;
agc->nr_gpio_sets = 8;
agc->reg_table = aspeed_3_3v_gpios;
+ agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
}
static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *data)
@@ -1137,6 +1151,7 @@ static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *data)
agc->nr_gpio_pins = 208;
agc->nr_gpio_sets = 7;
agc->reg_table = aspeed_3_3v_gpios;
+ agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
}
static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *data)
@@ -1147,6 +1162,7 @@ static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *data)
agc->nr_gpio_pins = 36;
agc->nr_gpio_sets = 2;
agc->reg_table = aspeed_1_8v_gpios;
+ agc->reg_table_count = GPIO_1_8V_REG_ARRAY_SIZE;
}
static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data)
@@ -1157,6 +1173,7 @@ static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data)
agc->nr_gpio_pins = 151;
agc->nr_gpio_sets = 6;
agc->reg_table = aspeed_3_3v_gpios;
+ agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
}
static const TypeInfo aspeed_gpio_info = {
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 93e2e29..ebf139c 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -271,6 +271,12 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
assert(asc->max_ram_size < 4 * GiB || asc->is_bus64bit);
+
+ if (!s->ram_size) {
+ error_setg(errp, "RAM size is not set");
+ return;
+ }
+
s->max_ram_size = asc->max_ram_size;
memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s,
@@ -589,7 +595,6 @@ static void aspeed_2700_sdmc_write(AspeedSDMCState *s, uint32_t reg,
case R_INT_STATUS:
case R_INT_CLEAR:
case R_INT_MASK:
- case R_MAIN_STATUS:
case R_ERR_STATUS:
case R_ECC_FAIL_STATUS:
case R_ECC_FAIL_ADDR:
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 74b6c3d..25e4c0c 100644
--- a/hw/net/ftgmac100.c
+++ b/hw/net/ftgmac100.c
@@ -238,7 +238,8 @@ typedef struct {
*/
#define FTGMAC100_MAX_FRAME_SIZE 9220
-/* Limits depending on the type of the frame
+/*
+ * Limits depending on the type of the frame
*
* 9216 for Jumbo frames (+ 4 for VLAN)
* 1518 for other frames (+ 4 for VLAN)
@@ -533,8 +534,10 @@ static void ftgmac100_do_tx(FTGMAC100State *s, uint32_t tx_ring,
break;
}
- /* record transmit flags as they are valid only on the first
- * segment */
+ /*
+ * record transmit flags as they are valid only on the first
+ * segment
+ */
if (bd.des0 & FTGMAC100_TXDES0_FTS) {
flags = bd.des1;
}
@@ -639,7 +642,8 @@ static bool ftgmac100_can_receive(NetClientState *nc)
*/
static uint32_t ftgmac100_rxpoll(FTGMAC100State *s)
{
- /* Polling times :
+ /*
+ * Polling times :
*
* Speed TIME_SEL=0 TIME_SEL=1
*
generated by cgit v1.1 at 2025-02-13 10:56:18 +0000