aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
Diffstat (limited to 'hw')
-rw-r--r--hw/9pfs/9p-xattr-user.c8
-rw-r--r--hw/acpi/nvdimm.c2
-rw-r--r--hw/i386/pc_piix.c3
-rw-r--r--hw/i386/xen/xen-hvm.c17
-rw-r--r--hw/ide/atapi.c4
-rw-r--r--hw/intc/openpic.c2
-rw-r--r--hw/isa/piix3.c15
-rw-r--r--hw/net/imx_fec.c2
-rw-r--r--hw/nvme/ctrl.c2
-rw-r--r--hw/pci-host/i440fx.c4
-rw-r--r--hw/pci/pcie_aer.c2
-rw-r--r--hw/pci/shpc.c3
-rw-r--r--hw/ppc/spapr_caps.c2
-rw-r--r--hw/scsi/spapr_vscsi.c2
14 files changed, 32 insertions, 36 deletions
diff --git a/hw/9pfs/9p-xattr-user.c b/hw/9pfs/9p-xattr-user.c
index f2ae958..535677e 100644
--- a/hw/9pfs/9p-xattr-user.c
+++ b/hw/9pfs/9p-xattr-user.c
@@ -27,7 +27,7 @@ static ssize_t mp_user_getxattr(FsContext *ctx, const char *path,
{
if (strncmp(name, "user.virtfs.", 12) == 0) {
/*
- * Don't allow fetch of user.virtfs namesapce
+ * Don't allow fetch of user.virtfs namespace
* in case of mapped security
*/
errno = ENOATTR;
@@ -49,7 +49,7 @@ static ssize_t mp_user_listxattr(FsContext *ctx, const char *path,
name_size -= 12;
} else {
/*
- * Don't allow fetch of user.virtfs namesapce
+ * Don't allow fetch of user.virtfs namespace
* in case of mapped security
*/
return 0;
@@ -74,7 +74,7 @@ static int mp_user_setxattr(FsContext *ctx, const char *path, const char *name,
{
if (strncmp(name, "user.virtfs.", 12) == 0) {
/*
- * Don't allow fetch of user.virtfs namesapce
+ * Don't allow fetch of user.virtfs namespace
* in case of mapped security
*/
errno = EACCES;
@@ -88,7 +88,7 @@ static int mp_user_removexattr(FsContext *ctx,
{
if (strncmp(name, "user.virtfs.", 12) == 0) {
/*
- * Don't allow fetch of user.virtfs namesapce
+ * Don't allow fetch of user.virtfs namespace
* in case of mapped security
*/
errno = EACCES;
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index 0d43da1..5f85b16 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/acpi/nvdimm.c
@@ -476,7 +476,7 @@ struct NvdimmFuncGetLabelDataOut {
/* the size of buffer filled by QEMU. */
uint32_t len;
uint32_t func_ret_status; /* return status code. */
- uint8_t out_buf[]; /* the data got via Get Namesapce Label function. */
+ uint8_t out_buf[]; /* the data got via Get Namespace Label function. */
} QEMU_PACKED;
typedef struct NvdimmFuncGetLabelDataOut NvdimmFuncGetLabelDataOut;
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataOut) > NVDIMM_DSM_MEMORY_SIZE);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 0fc2361..a234989 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -82,7 +82,6 @@ static void pc_init1(MachineState *machine,
MemoryRegion *system_io = get_system_io();
PCIBus *pci_bus;
ISABus *isa_bus;
- PCII440FXState *i440fx_state;
int piix3_devfn = -1;
qemu_irq smi_irq;
GSIState *gsi_state;
@@ -203,7 +202,6 @@ static void pc_init1(MachineState *machine,
pci_bus = i440fx_init(host_type,
pci_type,
- &i440fx_state,
system_memory, system_io, machine->ram_size,
x86ms->below_4g_mem_size,
x86ms->above_4g_mem_size,
@@ -217,7 +215,6 @@ static void pc_init1(MachineState *machine,
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
} else {
pci_bus = NULL;
- i440fx_state = NULL;
isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
&error_abort);
pcms->hpet_enabled = false;
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 0731f70..e4293d6 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -15,7 +15,6 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
#include "hw/i386/pc.h"
-#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/hw.h"
#include "hw/i386/apic-msidef.h"
@@ -149,21 +148,9 @@ void xen_piix3_set_irq(void *opaque, int irq_num, int level)
irq_num & 3, level);
}
-void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len)
+int xen_set_pci_link_route(uint8_t link, uint8_t irq)
{
- int i;
-
- /* Scan for updates to PCI link routes (0x60-0x63). */
- for (i = 0; i < len; i++) {
- uint8_t v = (val >> (8 * i)) & 0xff;
- if (v & 0x80) {
- v = 0;
- }
- v &= 0xf;
- if (((address + i) >= PIIX_PIRQCA) && ((address + i) <= PIIX_PIRQCD)) {
- xen_set_pci_link_route(xen_domid, address + i - PIIX_PIRQCA, v);
- }
- }
+ return xendevicemodel_set_pci_link_route(xen_dmod, xen_domid, link, irq);
}
int xen_is_pirq_msi(uint32_t msi_data)
diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c
index b626199..88b2890 100644
--- a/hw/ide/atapi.c
+++ b/hw/ide/atapi.c
@@ -318,7 +318,7 @@ static void ide_atapi_cmd_reply(IDEState *s, int size, int max_size)
}
}
-/* start a CD-CDROM read command */
+/* start a CD-ROM read command */
static void ide_atapi_cmd_read_pio(IDEState *s, int lba, int nb_sectors,
int sector_size)
{
@@ -417,7 +417,7 @@ eot:
ide_set_inactive(s, false);
}
-/* start a CD-CDROM read command with DMA */
+/* start a CD-ROM read command with DMA */
/* XXX: test if DMA is available */
static void ide_atapi_cmd_read_dma(IDEState *s, int lba, int nb_sectors,
int sector_size)
diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c
index 49504e7..b0787e8 100644
--- a/hw/intc/openpic.c
+++ b/hw/intc/openpic.c
@@ -729,7 +729,7 @@ static void openpic_tmr_set_tmr(OpenPICTimer *tmr, uint32_t val, bool enabled)
}
/*
- * Returns the currrent tccr value, i.e., timer value (in clocks) with
+ * Returns the current tccr value, i.e., timer value (in clocks) with
* appropriate TOG.
*/
static uint64_t openpic_tmr_get_timer(OpenPICTimer *tmr)
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 6388558..48f9ab1 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -138,7 +138,20 @@ static void piix3_write_config(PCIDevice *dev,
static void piix3_write_config_xen(PCIDevice *dev,
uint32_t address, uint32_t val, int len)
{
- xen_piix_pci_write_config_client(address, val, len);
+ int i;
+
+ /* Scan for updates to PCI link routes (0x60-0x63). */
+ for (i = 0; i < len; i++) {
+ uint8_t v = (val >> (8 * i)) & 0xff;
+ if (v & 0x80) {
+ v = 0;
+ }
+ v &= 0xf;
+ if (((address + i) >= PIIX_PIRQCA) && ((address + i) <= PIIX_PIRQCD)) {
+ xen_set_pci_link_route(address + i - PIIX_PIRQCA, v);
+ }
+ }
+
piix3_write_config(dev, address, val, len);
}
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index 0db9aaf..8c11b23 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -438,7 +438,7 @@ static void imx_eth_update(IMXFECState *s)
* assignment fail.
*
* To ensure that all versions of Linux work, generate ENET_INT_MAC
- * interrrupts on both interrupt lines. This should be changed if and when
+ * interrupts on both interrupt lines. This should be changed if and when
* qemu supports IOMUX.
*/
if (s->regs[ENET_EIR] & s->regs[ENET_EIMR] &
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index d349b3e..ca335dd 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -76,7 +76,7 @@
* the SUBNQN field in the controller will report the NQN of the subsystem
* device. This also enables multi controller capability represented in
* Identify Controller data structure in CMIC (Controller Multi-path I/O and
- * Namesapce Sharing Capabilities).
+ * Namespace Sharing Capabilities).
*
* - `aerl`
* The Asynchronous Event Request Limit (AERL). Indicates the maximum number
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index e087161..1c5ad5f 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -238,7 +238,6 @@ static void i440fx_realize(PCIDevice *dev, Error **errp)
}
PCIBus *i440fx_init(const char *host_type, const char *pci_type,
- PCII440FXState **pi440fx_state,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,
@@ -264,8 +263,7 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
d = pci_create_simple(b, 0, pci_type);
- *pi440fx_state = I440FX_PCI_DEVICE(d);
- f = *pi440fx_state;
+ f = I440FX_PCI_DEVICE(d);
f->system_memory = address_space_mem;
f->pci_address_space = pci_address_space;
f->ram_memory = ram_memory;
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 92bd053..eff62f3 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -323,7 +323,7 @@ static void pcie_aer_msg_root_port(PCIDevice *dev, const PCIEAERMsg *msg)
*/
}
- /* Errro Message Received: Root Error Status register */
+ /* Error Message Received: Root Error Status register */
switch (msg->severity) {
case PCI_ERR_ROOT_CMD_COR_EN:
if (root_status & PCI_ERR_ROOT_COR_RCV) {
diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c
index f822f18..e71f3a7 100644
--- a/hw/pci/shpc.c
+++ b/hw/pci/shpc.c
@@ -480,7 +480,8 @@ static const MemoryRegionOps shpc_mmio_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
.valid = {
/* SHPC ECN requires dword accesses, but the original 1.0 spec doesn't.
- * It's easier to suppport all sizes than worry about it. */
+ * It's easier to support all sizes than worry about it.
+ */
.min_access_size = 1,
.max_access_size = 4,
},
diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
index 655ab85..b428305 100644
--- a/hw/ppc/spapr_caps.c
+++ b/hw/ppc/spapr_caps.c
@@ -553,7 +553,7 @@ static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
* instruction is a harmless no-op. It won't correctly
* implement the cache count flush *but* if we have
* count-cache-disabled in the host, that flush is
- * unnnecessary. So, specifically allow this case. This
+ * unnecessary. So, specifically allow this case. This
* allows us to have better performance on POWER9 DD2.3,
* while still working on POWER9 DD2.2 and POWER8 host
* cpus.
diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c
index a07a8e1..e320cca 100644
--- a/hw/scsi/spapr_vscsi.c
+++ b/hw/scsi/spapr_vscsi.c
@@ -1013,7 +1013,7 @@ static int vscsi_send_capabilities(VSCSIState *s, vscsi_req *req)
}
/*
- * Current implementation does not suppport any migration or
+ * Current implementation does not support any migration or
* reservation capabilities. Construct the response telling the
* guest not to use them.
*/
generated by cgit v1.1 at 2024-08-19 14:02:16 +0000