diff options
Diffstat (limited to 'hw')
-rw-r--r-- | hw/hppa/Kconfig | 2 | ||||
-rw-r--r-- | hw/hppa/dino.h | 146 | ||||
-rw-r--r-- | hw/hppa/machine.c | 2 | ||||
-rw-r--r-- | hw/hppa/meson.build | 2 | ||||
-rw-r--r-- | hw/hppa/trace-events | 5 | ||||
-rw-r--r-- | hw/pci-host/Kconfig | 4 | ||||
-rw-r--r-- | hw/pci-host/dino.c (renamed from hw/hppa/dino.c) | 3 | ||||
-rw-r--r-- | hw/pci-host/meson.build | 3 | ||||
-rw-r--r-- | hw/pci-host/trace-events | 5 |
9 files changed, 16 insertions, 156 deletions
diff --git a/hw/hppa/Kconfig b/hw/hppa/Kconfig index 8d64ead..724380e 100644 --- a/hw/hppa/Kconfig +++ b/hw/hppa/Kconfig @@ -3,7 +3,7 @@ config HPPA_B160L imply PCI_DEVICES imply E1000_PCI imply VIRTIO_VGA - select PCI + select DINO select SERIAL select ISA_BUS select I8259 diff --git a/hw/hppa/dino.h b/hw/hppa/dino.h deleted file mode 100644 index a1b0184..0000000 --- a/hw/hppa/dino.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * HP-PARISC Dino PCI chipset emulation, as in B160L and similiar machines - * - * (C) 2017-2019 by Helge Deller <deller@gmx.de> - * - * This work is licensed under the GNU GPL license version 2 or later. - * - * Documentation available at: - * https://parisc.wiki.kernel.org/images-parisc/9/91/Dino_ers.pdf - * https://parisc.wiki.kernel.org/images-parisc/7/70/Dino_3_1_Errata.pdf - */ - -#ifndef DINO_H -#define DINO_H - -#include "hw/pci/pci_host.h" - -#define TYPE_DINO_PCI_HOST_BRIDGE "dino-pcihost" -OBJECT_DECLARE_SIMPLE_TYPE(DinoState, DINO_PCI_HOST_BRIDGE) - -#define DINO_IAR0 0x004 -#define DINO_IODC 0x008 -#define DINO_IRR0 0x00C /* RO */ -#define DINO_IAR1 0x010 -#define DINO_IRR1 0x014 /* RO */ -#define DINO_IMR 0x018 -#define DINO_IPR 0x01C -#define DINO_TOC_ADDR 0x020 -#define DINO_ICR 0x024 -#define DINO_ILR 0x028 /* RO */ -#define DINO_IO_COMMAND 0x030 /* WO */ -#define DINO_IO_STATUS 0x034 /* RO */ -#define DINO_IO_CONTROL 0x038 -#define DINO_IO_GSC_ERR_RESP 0x040 /* RO */ -#define DINO_IO_ERR_INFO 0x044 /* RO */ -#define DINO_IO_PCI_ERR_RESP 0x048 /* RO */ -#define DINO_IO_FBB_EN 0x05c -#define DINO_IO_ADDR_EN 0x060 -#define DINO_PCI_CONFIG_ADDR 0x064 -#define DINO_PCI_CONFIG_DATA 0x068 -#define DINO_PCI_IO_DATA 0x06c -#define DINO_PCI_MEM_DATA 0x070 /* Dino 3.x only */ -#define DINO_GSC2X_CONFIG 0x7b4 /* RO */ -#define DINO_GMASK 0x800 -#define DINO_PAMR 0x804 -#define DINO_PAPR 0x808 -#define DINO_DAMODE 0x80c -#define DINO_PCICMD 0x810 -#define DINO_PCISTS 0x814 /* R/WC */ -#define DINO_MLTIM 0x81c -#define DINO_BRDG_FEAT 0x820 -#define DINO_PCIROR 0x824 -#define DINO_PCIWOR 0x828 -#define DINO_TLTIM 0x830 - -#define DINO_IRQS 11 /* bits 0-10 are architected */ -#define DINO_IRR_MASK 0x5ff /* only 10 bits are implemented */ -#define DINO_LOCAL_IRQS (DINO_IRQS + 1) -#define DINO_MASK_IRQ(x) (1 << (x)) - -#define DINO_IRQ_PCIINTA 0 -#define DINO_IRQ_PCIINTB 1 -#define DINO_IRQ_PCIINTC 2 -#define DINO_IRQ_PCIINTD 3 -#define DINO_IRQ_PCIINTE 4 -#define DINO_IRQ_PCIINTF 5 -#define DINO_IRQ_GSCEXTINT 6 -#define DINO_IRQ_BUSERRINT 7 -#define DINO_IRQ_PS2INT 8 -#define DINO_IRQ_UNUSED 9 -#define DINO_IRQ_RS232INT 10 - -#define PCIINTA 0x001 -#define PCIINTB 0x002 -#define PCIINTC 0x004 -#define PCIINTD 0x008 -#define PCIINTE 0x010 -#define PCIINTF 0x020 -#define GSCEXTINT 0x040 -/* #define xxx 0x080 - bit 7 is "default" */ -/* #define xxx 0x100 - bit 8 not used */ -/* #define xxx 0x200 - bit 9 not used */ -#define RS232INT 0x400 - -#define DINO_MEM_CHUNK_SIZE (8 * MiB) - -#define DINO800_REGS (1 + (DINO_TLTIM - DINO_GMASK) / 4) -static const uint32_t reg800_keep_bits[DINO800_REGS] = { - MAKE_64BIT_MASK(0, 1), /* GMASK */ - MAKE_64BIT_MASK(0, 7), /* PAMR */ - MAKE_64BIT_MASK(0, 7), /* PAPR */ - MAKE_64BIT_MASK(0, 8), /* DAMODE */ - MAKE_64BIT_MASK(0, 7), /* PCICMD */ - MAKE_64BIT_MASK(0, 9), /* PCISTS */ - MAKE_64BIT_MASK(0, 32), /* Undefined */ - MAKE_64BIT_MASK(0, 8), /* MLTIM */ - MAKE_64BIT_MASK(0, 30), /* BRDG_FEAT */ - MAKE_64BIT_MASK(0, 24), /* PCIROR */ - MAKE_64BIT_MASK(0, 22), /* PCIWOR */ - MAKE_64BIT_MASK(0, 32), /* Undocumented */ - MAKE_64BIT_MASK(0, 9), /* TLTIM */ -}; - -/* offsets to DINO HPA: */ -#define DINO_PCI_ADDR 0x064 -#define DINO_CONFIG_DATA 0x068 -#define DINO_IO_DATA 0x06c - -struct DinoState { - PCIHostState parent_obj; - - /* - * PCI_CONFIG_ADDR is parent_obj.config_reg, via pci_host_conf_be_ops, - * so that we can map PCI_CONFIG_DATA to pci_host_data_be_ops. - */ - uint32_t config_reg_dino; /* keep original copy, including 2 lowest bits */ - - uint32_t iar0; - uint32_t iar1; - uint32_t imr; - uint32_t ipr; - uint32_t icr; - uint32_t ilr; - uint32_t io_fbb_en; - uint32_t io_addr_en; - uint32_t io_control; - uint32_t toc_addr; - - uint32_t reg800[DINO800_REGS]; - - MemoryRegion this_mem; - MemoryRegion pci_mem; - MemoryRegion pci_mem_alias[32]; - - MemoryRegion *memory_as; - - AddressSpace bm_as; - MemoryRegion bm; - MemoryRegion bm_ram_alias; - MemoryRegion bm_pci_alias; - MemoryRegion bm_cpu_alias; - - qemu_irq irqs[DINO_IRQS]; -}; - -#endif diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 4b753fa..c847feb 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -17,7 +17,7 @@ #include "hw/char/serial.h" #include "hw/net/lasi_82596.h" #include "hw/nmi.h" -#include "dino.h" +#include "hw/pci-host/dino.h" #include "hppa_sys.h" #include "qemu/units.h" #include "qapi/error.h" diff --git a/hw/hppa/meson.build b/hw/hppa/meson.build index 32072bf..a6f9db4 100644 --- a/hw/hppa/meson.build +++ b/hw/hppa/meson.build @@ -1,4 +1,4 @@ hppa_ss = ss.source_set() -hppa_ss.add(when: 'CONFIG_HPPA_B160L', if_true: files('pci.c', 'machine.c', 'dino.c', 'lasi.c')) +hppa_ss.add(when: 'CONFIG_HPPA_B160L', if_true: files('pci.c', 'machine.c', 'lasi.c')) hw_arch += {'hppa': hppa_ss} diff --git a/hw/hppa/trace-events b/hw/hppa/trace-events index 3f42be9..871a473 100644 --- a/hw/hppa/trace-events +++ b/hw/hppa/trace-events @@ -3,11 +3,6 @@ # pci.c hppa_pci_iack_write(void) "" -# dino.c -dino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" -dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" -dino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" - # lasi.c lasi_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" lasi_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index 2b5f7d5..38fd2ee 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -77,3 +77,7 @@ config MV64361 bool select PCI select I8259 + +config DINO + bool + select PCI diff --git a/hw/hppa/dino.c b/hw/pci-host/dino.c index aa7f812..f257c24 100644 --- a/hw/hppa/dino.c +++ b/hw/pci-host/dino.c @@ -18,9 +18,8 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" #include "hw/qdev-properties.h" -#include "dino.h" +#include "hw/pci-host/dino.h" #include "migration/vmstate.h" -#include "hppa_sys.h" #include "trace.h" #include "qom/object.h" diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build index 4c4f39c..c07596d 100644 --- a/hw/pci-host/meson.build +++ b/hw/pci-host/meson.build @@ -25,6 +25,9 @@ pci_ss.add(when: 'CONFIG_MV64361', if_true: files('mv64361.c')) # ARM devices pci_ss.add(when: 'CONFIG_VERSATILE_PCI', if_true: files('versatile.c')) +# HPPA devices +pci_ss.add(when: 'CONFIG_DINO', if_true: files('dino.c')) + softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss) specific_ss.add(when: 'CONFIG_PCI_POWERNV', if_true: files( diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index 6e5d8d3..437e66f 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -34,3 +34,8 @@ unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 pnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) "addr=@0x%"PRIx64" data=0x%"PRIx64 pnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 + +# dino.c +dino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" +dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" +dino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" |