aboutsummaryrefslogtreecommitdiff
path: root/hw/ppc
diff options
context:
space:
mode:
Diffstat (limited to 'hw/ppc')
-rw-r--r--hw/ppc/e500.c16
-rw-r--r--hw/ppc/mac_newworld.c16
-rw-r--r--hw/ppc/mac_oldworld.c6
-rw-r--r--hw/ppc/pnv.c8
-rw-r--r--hw/ppc/ppc440_uc.c4
-rw-r--r--hw/ppc/prep.c4
-rw-r--r--hw/ppc/sam460ex.c2
-rw-r--r--hw/ppc/spapr.c2
-rw-r--r--hw/ppc/spapr_irq.c2
-rw-r--r--hw/ppc/spapr_vio.c2
-rw-r--r--hw/ppc/virtex_ml507.c4
11 files changed, 33 insertions, 33 deletions
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 06f4a38..51bf95b 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -748,8 +748,8 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms,
qdev_prop_set_uint32(dev, "model", pmc->mpic_version);
qdev_prop_set_uint32(dev, "nb_cpus", smp_cpus);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
k = 0;
for (i = 0; i < smp_cpus; i++) {
@@ -771,7 +771,7 @@ static DeviceState *ppce500_init_mpic_kvm(const PPCE500MachineClass *pmc,
dev = qdev_new(TYPE_KVM_OPENPIC);
qdev_prop_set_uint32(dev, "model", pmc->mpic_version);
- qdev_realize_and_unref(dev, NULL, &err);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &err);
if (err) {
error_propagate(errp, err);
object_unparent(OBJECT(dev));
@@ -916,7 +916,7 @@ void ppce500_init(MachineState *machine)
dev = qdev_new("e500-ccsr");
object_property_add_child(qdev_get_machine(), "e500-ccsr",
OBJECT(dev));
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
ccsr = CCSR(dev);
ccsr_addr_space = &ccsr->ccsr_space;
memory_region_add_subregion(address_space_mem, pmc->ccsrbar_base,
@@ -939,7 +939,7 @@ void ppce500_init(MachineState *machine)
/* I2C */
dev = qdev_new("mpc-i2c");
s = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8544_I2C_IRQ));
memory_region_add_subregion(ccsr_addr_space, MPC8544_I2C_REGS_OFFSET,
sysbus_mmio_get_region(s, 0));
@@ -949,8 +949,8 @@ void ppce500_init(MachineState *machine)
/* General Utility device */
dev = qdev_new("mpc8544-guts");
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
memory_region_add_subregion(ccsr_addr_space, MPC8544_UTIL_OFFSET,
sysbus_mmio_get_region(s, 0));
@@ -959,8 +959,8 @@ void ppce500_init(MachineState *machine)
object_property_add_child(qdev_get_machine(), "pci-host", OBJECT(dev));
qdev_prop_set_uint32(dev, "first_slot", pmc->pci_first_slot);
qdev_prop_set_uint32(dev, "first_pin_irq", pci_irq_nrs[0]);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
for (i = 0; i < PCI_NUM_PINS; i++) {
sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, pci_irq_nrs[i]));
}
@@ -987,7 +987,7 @@ void ppce500_init(MachineState *machine)
dev = qdev_new("mpc8xxx_gpio");
s = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8XXX_GPIO_IRQ));
memory_region_add_subregion(ccsr_addr_space, MPC8XXX_GPIO_OFFSET,
sysbus_mmio_get_region(s, 0));
@@ -1003,7 +1003,7 @@ void ppce500_init(MachineState *machine)
dev->id = TYPE_PLATFORM_BUS_DEVICE;
qdev_prop_set_uint32(dev, "num_irqs", pmc->platform_bus_num_irqs);
qdev_prop_set_uint32(dev, "mmio_size", pmc->platform_bus_size);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
pms->pbus_dev = PLATFORM_BUS_DEVICE(dev);
s = SYS_BUS_DEVICE(pms->pbus_dev);
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index baa17cd..5f3a028 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -243,8 +243,8 @@ static void ppc_core99_init(MachineState *machine)
/* UniN init */
dev = qdev_new(TYPE_UNI_NORTH);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
memory_region_add_subregion(get_system_memory(), 0xf8000000,
sysbus_mmio_get_region(s, 0));
@@ -290,8 +290,8 @@ static void ppc_core99_init(MachineState *machine)
pic_dev = qdev_new(TYPE_OPENPIC);
qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
- qdev_realize_and_unref(pic_dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(pic_dev);
+ sysbus_realize_and_unref(s, &error_fatal);
k = 0;
for (i = 0; i < smp_cpus; i++) {
for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
@@ -306,7 +306,7 @@ static void ppc_core99_init(MachineState *machine)
dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
&error_abort);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
s = SYS_BUS_DEVICE(dev);
/* PCI hole */
@@ -325,8 +325,8 @@ static void ppc_core99_init(MachineState *machine)
dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
&error_abort);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, 0xf0800000);
sysbus_mmio_map(s, 1, 0xf0c00000);
@@ -334,8 +334,8 @@ static void ppc_core99_init(MachineState *machine)
dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
&error_abort);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, 0xf4800000);
sysbus_mmio_map(s, 1, 0xf4c00000);
@@ -344,7 +344,7 @@ static void ppc_core99_init(MachineState *machine)
qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
&error_abort);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
s = SYS_BUS_DEVICE(dev);
/* PCI hole */
@@ -444,7 +444,7 @@ static void ppc_core99_init(MachineState *machine)
dev = qdev_new(TYPE_MACIO_NVRAM);
qdev_prop_set_uint32(dev, "size", 0x2000);
qdev_prop_set_uint32(dev, "it_shift", 1);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
nvr = MACIO_NVRAM(dev);
pmac_format_nvram_partition(nvr, 0x2000);
@@ -456,8 +456,8 @@ static void ppc_core99_init(MachineState *machine)
qdev_prop_set_bit(dev, "dma_enabled", false);
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
OBJECT(fw_cfg));
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, CFG_ADDR);
sysbus_mmio_map(s, 1, CFG_ADDR + 2);
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 9034830..f8c204e 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -223,7 +223,7 @@ static void ppc_heathrow_init(MachineState *machine)
/* XXX: we register only 1 output pin for heathrow PIC */
pic_dev = qdev_new(TYPE_HEATHROW);
- qdev_realize_and_unref(pic_dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(pic_dev), &error_fatal);
/* Connect the heathrow PIC outputs to the 6xx bus */
for (i = 0; i < smp_cpus; i++) {
@@ -256,8 +256,8 @@ static void ppc_heathrow_init(MachineState *machine)
qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
&error_abort);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, GRACKLE_BASE);
sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
/* PCI hole */
@@ -315,8 +315,8 @@ static void ppc_heathrow_init(MachineState *machine)
qdev_prop_set_bit(dev, "dma_enabled", false);
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
OBJECT(fw_cfg));
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, CFG_ADDR);
sysbus_mmio_map(s, 1, CFG_ADDR + 2);
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 8cf097a..3eb40ad 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -733,7 +733,7 @@ static void pnv_init(MachineState *machine)
qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(pnor),
&error_abort);
}
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
pnv->pnor = PNV_PNOR(dev);
/* load skiboot firmware */
@@ -849,7 +849,7 @@ static void pnv_init(MachineState *machine)
object_property_set_link(chip, OBJECT(pnv), "xive-fabric",
&error_abort);
}
- qdev_realize_and_unref(DEVICE(chip), NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(chip), &error_fatal);
}
g_free(chip_typename);
@@ -1205,7 +1205,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
object_property_set_int(OBJECT(phb), i, "index", &error_fatal);
object_property_set_int(OBJECT(phb), chip->chip_id, "chip-id",
&error_fatal);
- qdev_realize(DEVICE(phb), NULL, &local_err);
+ sysbus_realize(SYS_BUS_DEVICE(phb), &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
@@ -1410,7 +1410,7 @@ static void pnv_chip_power9_phb_realize(PnvChip *chip, Error **errp)
object_property_set_int(obj, PNV_PHB4_DEVICE_ID, "device-id",
&error_fatal);
object_property_set_link(obj, OBJECT(stack), "stack", &error_abort);
- qdev_realize(DEVICE(obj), NULL, &local_err);
+ sysbus_realize(SYS_BUS_DEVICE(obj), &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index c1cf8d0..38fc392 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -1369,11 +1369,11 @@ void ppc460ex_pcie_init(CPUPPCState *env)
dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE0_BASE);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env);
dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE1_BASE);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env);
}
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 73a40b2..4a0cb43 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -278,7 +278,7 @@ static void ibm_40p_init(MachineState *machine)
qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE);
pcihost = SYS_BUS_DEVICE(dev);
object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev));
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(pcihost, &error_fatal);
pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci.0"));
if (!pci_bus) {
error_report("could not create PCI host controller");
@@ -351,8 +351,8 @@ static void ibm_40p_init(MachineState *machine)
qdev_prop_set_bit(dev, "dma_enabled", false);
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
OBJECT(fw_cfg));
- qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, CFG_ADDR);
sysbus_mmio_map(s, 1, CFG_ADDR + 2);
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 503bd21..1a106a6 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -373,8 +373,8 @@ static void sam460ex_init(MachineState *machine)
dev = qdev_new("sysbus-ohci");
qdev_prop_set_string(dev, "masterbus", "usb-bus.0");
qdev_prop_set_uint32(dev, "num-ports", 6);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
sbdev = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(sbdev, &error_fatal);
sysbus_mmio_map(sbdev, 0, 0x4bffd0000);
sysbus_connect_irq(sbdev, 0, uic[2][30]);
usb_create_simple(usb_bus_find(-1), "usb-kbd");
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 7ef24ea..c381bb6 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2642,7 +2642,7 @@ static PCIHostState *spapr_create_default_phb(void)
dev = qdev_new(TYPE_SPAPR_PCI_HOST_BRIDGE);
qdev_prop_set_uint32(dev, "index", 0);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
return PCI_HOST_BRIDGE(dev);
}
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
index f2ade64..79b0e40 100644
--- a/hw/ppc/spapr_irq.c
+++ b/hw/ppc/spapr_irq.c
@@ -334,7 +334,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3);
object_property_set_link(OBJECT(dev), OBJECT(spapr), "xive-fabric",
&error_abort);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
spapr->xive = SPAPR_XIVE(dev);
diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
index 61558db..4318ed9 100644
--- a/hw/ppc/spapr_vio.c
+++ b/hw/ppc/spapr_vio.c
@@ -577,7 +577,7 @@ SpaprVioBus *spapr_vio_bus_init(void)
/* Create bridge device */
dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Create bus on bridge device */
qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index f28a69c..78c4901 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -231,7 +231,7 @@ static void virtex_init(MachineState *machine)
cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
dev = qdev_new("xlnx.xps-intc");
qdev_prop_set_uint32(dev, "kind-of-intr", 0);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]);
for (i = 0; i < 32; i++) {
@@ -245,7 +245,7 @@ static void virtex_init(MachineState *machine)
dev = qdev_new("xlnx.xps-timer");
qdev_prop_set_uint32(dev, "one-timer-only", 0);
qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
- qdev_realize_and_unref(dev, NULL, &error_fatal);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
generated by cgit v1.1 at 2024-11-03 14:30:08 +0000