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-rw-r--r--hw/pci-host/grackle.c2
-rw-r--r--hw/pci-host/i440fx.c12
-rw-r--r--hw/pci-host/pnv_phb3_msi.c3
-rw-r--r--hw/pci-host/pnv_phb3_pbcq.c3
-rw-r--r--hw/pci-host/q35.c20
-rw-r--r--hw/pci-host/sabre.c2
-rw-r--r--hw/pci-host/uninorth.c8
7 files changed, 24 insertions, 26 deletions
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index 24ccdf6..4b3af0c 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -109,7 +109,7 @@ static void grackle_init(Object *obj)
object_property_add_link(obj, "pic", TYPE_HEATHROW,
(Object **) &s->pic,
qdev_prop_allow_set_link_before_realize,
- 0, NULL);
+ 0);
sysbus_init_mmio(sbd, &phb->conf_mem);
sysbus_init_mmio(sbd, &phb->data_mem);
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index d980c97..0adbd77 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -212,19 +212,19 @@ static void i440fx_pcihost_initfn(Object *obj)
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "uint32",
i440fx_pcihost_get_pci_hole_start,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_END, "uint32",
i440fx_pcihost_get_pci_hole_end,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_START, "uint64",
i440fx_pcihost_get_pci_hole64_start,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_END, "uint64",
i440fx_pcihost_get_pci_hole64_end,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
}
static void i440fx_pcihost_realize(DeviceState *dev, Error **errp)
@@ -275,7 +275,7 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
b = pci_root_bus_new(dev, NULL, pci_address_space,
address_space_io, 0, TYPE_PCI_BUS);
s->bus = b;
- object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL);
+ object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev));
qdev_init_nofail(dev);
d = pci_create_simple(b, 0, pci_type);
@@ -308,7 +308,7 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type,
memory_region_set_enabled(&f->low_smram, true);
memory_region_add_subregion(&f->smram, 0xa0000, &f->low_smram);
object_property_add_const_link(qdev_get_machine(), "smram",
- OBJECT(&f->smram), &error_abort);
+ OBJECT(&f->smram));
init_pam(dev, f->ram_memory, f->system_memory, f->pci_address_space,
&f->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE);
diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c
index d645468..099d209 100644
--- a/hw/pci-host/pnv_phb3_msi.c
+++ b/hw/pci-host/pnv_phb3_msi.c
@@ -282,8 +282,7 @@ static void phb3_msi_instance_init(Object *obj)
object_property_add_link(obj, "phb", TYPE_PNV_PHB3,
(Object **)&msi->phb,
object_property_allow_set_link,
- OBJ_PROP_LINK_STRONG,
- &error_abort);
+ OBJ_PROP_LINK_STRONG);
/* Will be overriden later */
ics->offset = 0;
diff --git a/hw/pci-host/pnv_phb3_pbcq.c b/hw/pci-host/pnv_phb3_pbcq.c
index 7b9a121..a0526aa 100644
--- a/hw/pci-host/pnv_phb3_pbcq.c
+++ b/hw/pci-host/pnv_phb3_pbcq.c
@@ -324,8 +324,7 @@ static void phb3_pbcq_instance_init(Object *obj)
object_property_add_link(obj, "phb", TYPE_PNV_PHB3,
(Object **)&pbcq->phb,
object_property_allow_set_link,
- OBJ_PROP_LINK_STRONG,
- &error_abort);
+ OBJ_PROP_LINK_STRONG);
}
static void pnv_pbcq_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 2bbc90b..352aeec 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -222,38 +222,38 @@ static void q35_host_initfn(Object *obj)
Q35_PCI_HOST_HOLE64_SIZE_DEFAULT);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "uint32",
q35_host_get_pci_hole_start,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_END, "uint32",
q35_host_get_pci_hole_end,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_START, "uint64",
q35_host_get_pci_hole64_start,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_END, "uint64",
q35_host_get_pci_hole64_end,
- NULL, NULL, NULL, NULL);
+ NULL, NULL, NULL);
object_property_add_uint64_ptr(obj, PCIE_HOST_MCFG_SIZE,
- &pehb->size, OBJ_PROP_FLAG_READ, NULL);
+ &pehb->size, OBJ_PROP_FLAG_READ);
object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.ram_memory,
- qdev_prop_allow_set_link_before_realize, 0, NULL);
+ qdev_prop_allow_set_link_before_realize, 0);
object_property_add_link(obj, MCH_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.pci_address_space,
- qdev_prop_allow_set_link_before_realize, 0, NULL);
+ qdev_prop_allow_set_link_before_realize, 0);
object_property_add_link(obj, MCH_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.system_memory,
- qdev_prop_allow_set_link_before_realize, 0, NULL);
+ qdev_prop_allow_set_link_before_realize, 0);
object_property_add_link(obj, MCH_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION,
(Object **) &s->mch.address_space_io,
- qdev_prop_allow_set_link_before_realize, 0, NULL);
+ qdev_prop_allow_set_link_before_realize, 0);
}
static const TypeInfo q35_host_info = {
@@ -638,7 +638,7 @@ static void mch_realize(PCIDevice *d, Error **errp)
&mch->smbase_window);
object_property_add_const_link(qdev_get_machine(), "smram",
- OBJECT(&mch->smram), &error_abort);
+ OBJECT(&mch->smram));
init_pam(DEVICE(mch), mch->ram_memory, mch->system_memory,
mch->pci_address_space, &mch->pam_regions[0],
diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
index 2b8503b..475bcb0 100644
--- a/hw/pci-host/sabre.c
+++ b/hw/pci-host/sabre.c
@@ -442,7 +442,7 @@ static void sabre_init(Object *obj)
object_property_add_link(obj, "iommu", TYPE_SUN4U_IOMMU,
(Object **) &s->iommu,
qdev_prop_allow_set_link_before_realize,
- 0, NULL);
+ 0);
/* sabre_config */
memory_region_init_io(&s->sabre_config, OBJECT(s), &sabre_config_ops, s,
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index cf70b76..1ed1072 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -175,7 +175,7 @@ static void pci_unin_main_init(Object *obj)
object_property_add_link(obj, "pic", TYPE_OPENPIC,
(Object **) &s->pic,
qdev_prop_allow_set_link_before_realize,
- 0, NULL);
+ 0);
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
@@ -223,7 +223,7 @@ static void pci_u3_agp_init(Object *obj)
object_property_add_link(obj, "pic", TYPE_OPENPIC,
(Object **) &s->pic,
qdev_prop_allow_set_link_before_realize,
- 0, NULL);
+ 0);
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
@@ -262,7 +262,7 @@ static void pci_unin_agp_init(Object *obj)
object_property_add_link(obj, "pic", TYPE_OPENPIC,
(Object **) &s->pic,
qdev_prop_allow_set_link_before_realize,
- 0, NULL);
+ 0);
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
@@ -299,7 +299,7 @@ static void pci_unin_internal_init(Object *obj)
object_property_add_link(obj, "pic", TYPE_OPENPIC,
(Object **) &s->pic,
qdev_prop_allow_set_link_before_realize,
- 0, NULL);
+ 0);
sysbus_init_mmio(sbd, &h->conf_mem);
sysbus_init_mmio(sbd, &h->data_mem);
generated by cgit v1.1 at 2025-01-13 23:11:32 +0000