diff options
Diffstat (limited to 'hw/i386')
| -rw-r--r-- | hw/i386/amd_iommu.c | 20 | ||||
| -rw-r--r-- | hw/i386/pc_piix.c | 5 | ||||
| -rw-r--r-- | hw/i386/tdvf.c | 6 |
3 files changed, 18 insertions, 13 deletions
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 0775c8f..963aa24 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1426,7 +1426,6 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn) AMDVIState *s = opaque; AMDVIAddressSpace **iommu_as, *amdvi_dev_as; int bus_num = pci_bus_num(bus); - X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s); iommu_as = s->address_spaces[bus_num]; @@ -1486,15 +1485,8 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn) AMDVI_INT_ADDR_FIRST, &amdvi_dev_as->iommu_ir, 1); - if (!x86_iommu->pt_supported) { - memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, false); - memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu), - true); - } else { - memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu), - false); - memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, true); - } + memory_region_set_enabled(&amdvi_dev_as->iommu_nodma, false); + memory_region_set_enabled(MEMORY_REGION(&amdvi_dev_as->iommu), true); } return &iommu_as[devfn]->as; } @@ -1723,6 +1715,14 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) exit(EXIT_FAILURE); } + if (s->xtsup) { + if (kvm_irqchip_is_split() && !kvm_enable_x2apic()) { + error_report("AMD IOMMU xtsup=on requires x2APIC support on " + "the KVM side"); + exit(EXIT_FAILURE); + } + } + pci_setup_iommu(bus, &amdvi_iommu_ops, s); amdvi_init(s); } diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 7a62bb0..ea7572e 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -285,6 +285,8 @@ static void pc_init1(MachineState *machine, const char *pci_type) pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0"); pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1"); } else { + uint32_t irq; + isa_bus = isa_bus_new(NULL, system_memory, system_io, &error_abort); isa_bus_register_input_irqs(isa_bus, x86ms->gsi); @@ -292,6 +294,9 @@ static void pc_init1(MachineState *machine, const char *pci_type) x86ms->rtc = isa_new(TYPE_MC146818_RTC); qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000); isa_realize_and_unref(x86ms->rtc, isa_bus, &error_fatal); + irq = object_property_get_uint(OBJECT(x86ms->rtc), "irq", + &error_fatal); + isa_connect_gpio_out(ISA_DEVICE(x86ms->rtc), 0, irq); i8257_dma_init(OBJECT(machine), isa_bus, 0); pcms->hpet_enabled = false; diff --git a/hw/i386/tdvf.c b/hw/i386/tdvf.c index bd993ea..645d9d1 100644 --- a/hw/i386/tdvf.c +++ b/hw/i386/tdvf.c @@ -101,16 +101,16 @@ static int tdvf_parse_and_check_section_entry(const TdvfSectionEntry *src, /* sanity check */ if (entry->size < entry->data_len) { - error_report("Broken metadata RawDataSize 0x%x MemoryDataSize 0x%lx", + error_report("Broken metadata RawDataSize 0x%x MemoryDataSize 0x%"PRIx64, entry->data_len, entry->size); return -1; } if (!QEMU_IS_ALIGNED(entry->address, TDVF_ALIGNMENT)) { - error_report("MemoryAddress 0x%lx not page aligned", entry->address); + error_report("MemoryAddress 0x%"PRIx64" not page aligned", entry->address); return -1; } if (!QEMU_IS_ALIGNED(entry->size, TDVF_ALIGNMENT)) { - error_report("MemoryDataSize 0x%lx not page aligned", entry->size); + error_report("MemoryDataSize 0x%"PRIx64" not page aligned", entry->size); return -1; } |