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path: root/hw/arm/allwinner-h3.c
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Diffstat (limited to 'hw/arm/allwinner-h3.c')
-rw-r--r--hw/arm/allwinner-h3.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c
index 2efced3..1b1afa4 100644
--- a/hw/arm/allwinner-h3.c
+++ b/hw/arm/allwinner-h3.c
@@ -408,19 +408,19 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp)
/* UART0. For future clocktree API: All UARTS are connected to APB2_CLK. */
serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART0], 2,
qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART0),
- 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
+ 115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
/* UART1 */
serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART1], 2,
qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART1),
- 115200, serial_hd(1), DEVICE_NATIVE_ENDIAN);
+ 115200, serial_hd(1), DEVICE_LITTLE_ENDIAN);
/* UART2 */
serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART2], 2,
qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART2),
- 115200, serial_hd(2), DEVICE_NATIVE_ENDIAN);
+ 115200, serial_hd(2), DEVICE_LITTLE_ENDIAN);
/* UART3 */
serial_mm_init(get_system_memory(), s->memmap[AW_H3_DEV_UART3], 2,
qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART3),
- 115200, serial_hd(3), DEVICE_NATIVE_ENDIAN);
+ 115200, serial_hd(3), DEVICE_LITTLE_ENDIAN);
/* DRAMC */
sysbus_realize(SYS_BUS_DEVICE(&s->dramc), &error_fatal);