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-rw-r--r--docs/devel/lockcnt.txt2
-rw-r--r--include/qemu/atomic.h4
-rw-r--r--tcg/README2
3 files changed, 4 insertions, 4 deletions
diff --git a/docs/devel/lockcnt.txt b/docs/devel/lockcnt.txt
index 2a79b32..7c099bc 100644
--- a/docs/devel/lockcnt.txt
+++ b/docs/devel/lockcnt.txt
@@ -145,7 +145,7 @@ can also be more efficient in two ways:
- on some platforms, one can implement QemuLockCnt to hold the lock
and the mutex in a single word, making the fast path no more expensive
than simply managing a counter using atomic operations (see
- docs/atomics.txt). This can be very helpful if concurrent access to
+ docs/devel/atomics.txt). This can be very helpful if concurrent access to
the data structure is expected to be rare.
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index e07c797..b6b62fb 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -8,7 +8,7 @@
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
*
- * See docs/atomics.txt for discussion about the guarantees each
+ * See docs/devel/atomics.txt for discussion about the guarantees each
* atomic primitive is meant to provide.
*/
@@ -427,7 +427,7 @@
* sequentially consistent operations.
*
* As long as they are used as paired operations they are safe to
- * use. See docs/atomic.txt for more discussion.
+ * use. See docs/devel/atomics.txt for more discussion.
*/
#ifndef atomic_mb_read
diff --git a/tcg/README b/tcg/README
index bf49e82..03bfb6a 100644
--- a/tcg/README
+++ b/tcg/README
@@ -446,7 +446,7 @@ when MTTCG is enabled.
The guest translators should generate this opcode for all guest instructions
which have ordering side effects.
-Please see docs/atomics.txt for more information on memory barriers.
+Please see docs/devel/atomics.txt for more information on memory barriers.
********* 64-bit guest on 32-bit host support