diff options
| -rw-r--r-- | accel/tcg/cputlb.c | 16 | ||||
| -rw-r--r-- | include/exec/cpu-defs.h | 6 |
2 files changed, 2 insertions, 20 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index f6c37bc..af6bd8c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -174,20 +174,8 @@ void tlb_flush_by_mmuidx(CPUState *cpu, uint16_t idxmap) tlb_debug("mmu_idx: 0x%" PRIx16 "\n", idxmap); if (cpu->created && !qemu_cpu_is_self(cpu)) { - CPUArchState *env = cpu->env_ptr; - uint16_t pending, to_clean; - - qemu_spin_lock(&env->tlb_c.lock); - pending = env->tlb_c.pending_flush; - to_clean = idxmap & ~pending; - env->tlb_c.pending_flush = pending | idxmap; - qemu_spin_unlock(&env->tlb_c.lock); - - if (to_clean) { - tlb_debug("reduced mmu_idx: 0x%" PRIx16 "\n", to_clean); - async_run_on_cpu(cpu, tlb_flush_by_mmuidx_async_work, - RUN_ON_CPU_HOST_INT(to_clean)); - } + async_run_on_cpu(cpu, tlb_flush_by_mmuidx_async_work, + RUN_ON_CPU_HOST_INT(idxmap)); } else { tlb_flush_by_mmuidx_async_work(cpu, RUN_ON_CPU_HOST_INT(idxmap)); } diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index ca0fea8..6a60f94 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -161,12 +161,6 @@ typedef struct CPUTLBCommon { /* Serialize updates to tlb_table and tlb_v_table, and others as noted. */ QemuSpin lock; /* - * Within pending_flush, for each bit N, there exists an outstanding - * cross-cpu flush for mmu_idx N. Further cross-cpu flushes to that - * mmu_idx may be discarded. Protected by tlb_c.lock. - */ - uint16_t pending_flush; - /* * Within dirty, for each bit N, modifications have been made to * mmu_idx N since the last time that mmu_idx was flushed. * Protected by tlb_c.lock. |