diff options
| -rw-r--r-- | hw/pci-host/pnv_phb3.c | 15 | ||||
| -rw-r--r-- | hw/ppc/pnv.c | 8 | ||||
| -rw-r--r-- | include/hw/pci-host/pnv_phb3.h | 2 | ||||
| -rw-r--r-- | include/hw/ppc/pnv.h | 1 |
4 files changed, 15 insertions, 11 deletions
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 3467bbb..fdc8d0b 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -19,6 +19,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "qom/object.h" +#include "sysemu/sysemu.h" #define phb3_error(phb, fmt, ...) \ qemu_log_mask(LOG_GUEST_ERROR, "phb3[%d:%d]: " fmt "\n", \ @@ -981,10 +982,6 @@ static void pnv_phb3_instance_init(Object *obj) /* Power Bus Common Queue */ object_initialize_child(obj, "pbcq", &phb->pbcq, TYPE_PNV_PBCQ); - /* Root Port */ - object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB3_ROOT_PORT); - qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); - qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); } static void pnv_phb3_realize(DeviceState *dev, Error **errp) @@ -1053,10 +1050,10 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) pci_setup_iommu(pci->bus, pnv_phb3_dma_iommu, phb); - /* Add a single Root port */ - qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); - qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); - qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); + if (defaults_enabled()) { + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), + TYPE_PNV_PHB3_ROOT_PORT); + } } void pnv_phb3_update_regions(PnvPHB3 *phb) @@ -1177,7 +1174,7 @@ static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data) device_class_set_parent_realize(dc, pnv_phb3_root_port_realize, &rpc->parent_realize); - dc->user_creatable = false; + dc->user_creatable = true; k->vendor_id = PCI_VENDOR_ID_IBM; k->device_id = 0x03dc; diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 9de8b83..3a263f6 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1156,6 +1156,14 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp) } } +/* Attach a root port device */ +void pnv_phb_attach_root_port(PCIHostState *pci, const char *name) +{ + PCIDevice *root = pci_new(PCI_DEVFN(0, 0), name); + + pci_realize_and_unref(root, pci->bus, &error_fatal); +} + static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) { PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev); diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index e9c13e6..2e423c3 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -155,8 +155,6 @@ struct PnvPHB3 { PnvPBCQState pbcq; - PnvPHB3RootPort root; - QLIST_HEAD(, PnvPhb3DMASpace) dma_spaces; PnvChip *chip; diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index c781525..c726288 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -177,6 +177,7 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10, TYPE_PNV_CHIP_POWER10) PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); +void pnv_phb_attach_root_port(PCIHostState *pci, const char *name); #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv") typedef struct PnvMachineClass PnvMachineClass; |