diff options
| -rw-r--r-- | hw/mips_mipssim.c | 3 | ||||
| -rw-r--r-- | hw/serial.c | 4 | ||||
| -rw-r--r-- | hw/serial.h | 2 |
3 files changed, 5 insertions, 4 deletions
diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c index a95a3c1..20b5f1a 100644 --- a/hw/mips_mipssim.c +++ b/hw/mips_mipssim.c @@ -217,7 +217,8 @@ mips_mipssim_init(QEMUMachineInitArgs *args) /* A single 16450 sits at offset 0x3f8. It is attached to MIPS CPU INT2, which is interrupt 4. */ if (serial_hds[0]) - serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]); + serial_init(0x3f8, env->irq[4], 115200, serial_hds[0], + get_system_io()); if (nd_table[0].used) /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ diff --git a/hw/serial.c b/hw/serial.c index 60283ea..07a2a11 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -718,7 +718,7 @@ const MemoryRegionOps serial_io_ops = { }; SerialState *serial_init(int base, qemu_irq irq, int baudbase, - CharDriverState *chr) + CharDriverState *chr, MemoryRegion *system_io) { SerialState *s; @@ -732,7 +732,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, vmstate_register(NULL, base, &vmstate_serial, s); memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8); - memory_region_add_subregion(get_system_io(), base, &s->io); + memory_region_add_subregion(system_io, base, &s->io); return s; } diff --git a/hw/serial.h b/hw/serial.h index f1e3c4a..ed1a5cd 100644 --- a/hw/serial.h +++ b/hw/serial.h @@ -89,7 +89,7 @@ void serial_set_frequency(SerialState *s, uint32_t frequency); /* legacy pre qom */ SerialState *serial_init(int base, qemu_irq irq, int baudbase, - CharDriverState *chr); + CharDriverState *chr, MemoryRegion *system_io); SerialState *serial_mm_init(MemoryRegion *address_space, hwaddr base, int it_shift, qemu_irq irq, int baudbase, |