diff options
| -rw-r--r-- | hw/mips_int.c | 13 | ||||
| -rw-r--r-- | hw/mips_timer.c | 7 | ||||
| -rw-r--r-- | target-mips/helper.c | 14 | ||||
| -rw-r--r-- | target-mips/op.c | 7 |
4 files changed, 28 insertions, 13 deletions
diff --git a/hw/mips_int.c b/hw/mips_int.c index 93d599f..7f9f153 100644 --- a/hw/mips_int.c +++ b/hw/mips_int.c @@ -20,20 +20,15 @@ void cpu_mips_update_irq(CPUState *env) void cpu_mips_irq_request(void *opaque, int irq, int level) { - CPUState *env = first_cpu; - - uint32_t mask; + CPUState *env = (CPUState *)opaque; - if (irq >= 16) + if (irq < 0 || irq > 7) return; - mask = 1 << (irq + CP0Ca_IP); - if (level) { - env->CP0_Cause |= mask; + env->CP0_Cause |= 1 << (irq + CP0Ca_IP); } else { - env->CP0_Cause &= ~mask; + env->CP0_Cause &= ~(1 << (irq +CP0Ca_IP)); } cpu_mips_update_irq(env); } - diff --git a/hw/mips_timer.c b/hw/mips_timer.c index bc83036..055ee5b 100644 --- a/hw/mips_timer.c +++ b/hw/mips_timer.c @@ -28,6 +28,9 @@ static void cpu_mips_update_count (CPUState *env, uint32_t count, uint64_t now, next; uint32_t tmp; + if (env->CP0_Cause & (1 << CP0Ca_DC)) + return; + tmp = count; if (count == compare) tmp++; @@ -57,6 +60,8 @@ void cpu_mips_store_count (CPUState *env, uint32_t value) void cpu_mips_store_compare (CPUState *env, uint32_t value) { cpu_mips_update_count(env, cpu_mips_get_count(env), value); + if ((env->CP0_Config0 & (0x7 << CP0C0_AR)) == (1 << CP0C0_AR)) + env->CP0_Cause &= ~(1 << CP0Ca_TI); cpu_mips_irq_request(env, 7, 0); } @@ -71,6 +76,8 @@ static void mips_timer_cb (void *opaque) } #endif cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare); + if ((env->CP0_Config0 & (0x7 << CP0C0_AR)) == (1 << CP0C0_AR)) + env->CP0_Cause |= 1 << CP0Ca_TI; cpu_mips_irq_request(env, 7, 1); } diff --git a/target-mips/helper.c b/target-mips/helper.c index 9ba4017..0b23f35 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -295,9 +295,12 @@ void do_interrupt (CPUState *env) /* If the exception was raised from a delay slot, come back to the jump. */ env->CP0_DEPC = env->PC - 4; + if (!(env->hflags & MIPS_HFLAG_EXL)) + env->CP0_Cause |= (1 << CP0Ca_BD); env->hflags &= ~MIPS_HFLAG_BMASK; } else { env->CP0_DEPC = env->PC; + env->CP0_Cause &= ~(1 << CP0Ca_BD); } enter_debug_mode: env->hflags |= MIPS_HFLAG_DM; @@ -318,9 +321,12 @@ void do_interrupt (CPUState *env) /* If the exception was raised from a delay slot, come back to the jump. */ env->CP0_ErrorEPC = env->PC - 4; + if (!(env->hflags & MIPS_HFLAG_EXL)) + env->CP0_Cause |= (1 << CP0Ca_BD); env->hflags &= ~MIPS_HFLAG_BMASK; } else { env->CP0_ErrorEPC = env->PC; + env->CP0_Cause &= ~(1 << CP0Ca_BD); } env->hflags |= MIPS_HFLAG_ERL; env->CP0_Status |= (1 << CP0St_ERL) | (1 << CP0St_BEV); @@ -364,7 +370,8 @@ void do_interrupt (CPUState *env) goto set_EPC; case EXCP_CpU: cause = 11; - env->CP0_Cause = (env->CP0_Cause & ~0x03000000) | (env->error_code << 28); + env->CP0_Cause = (env->CP0_Cause & ~(0x3 << CP0Ca_CE)) | + (env->error_code << CP0Ca_CE); goto set_EPC; case EXCP_OVERFLOW: cause = 12; @@ -385,11 +392,12 @@ void do_interrupt (CPUState *env) /* If the exception was raised from a delay slot, come back to the jump. */ env->CP0_EPC = env->PC - 4; - env->CP0_Cause |= 0x80000000; + if (!(env->hflags & MIPS_HFLAG_EXL)) + env->CP0_Cause |= (1 << CP0Ca_BD); env->hflags &= ~MIPS_HFLAG_BMASK; } else { env->CP0_EPC = env->PC; - env->CP0_Cause &= ~0x80000000; + env->CP0_Cause &= ~(1 << CP0Ca_BD); } if (env->CP0_Status & (1 << CP0St_BEV)) { env->PC = (int32_t)0xBFC00200; diff --git a/target-mips/op.c b/target-mips/op.c index 7c7ce3b..a286cef 100644 --- a/target-mips/op.c +++ b/target-mips/op.c @@ -1397,7 +1397,12 @@ void op_mtc0_srsmap (void) void op_mtc0_cause (void) { - env->CP0_Cause = (env->CP0_Cause & 0xB000F87C) | (T0 & 0x00C00300); + uint32_t mask = 0x00C00300; + + if ((env->CP0_Config0 & (0x7 << CP0C0_AR)) == (1 << CP0C0_AR)) + mask |= 1 << CP0Ca_DC; + + env->CP0_Cause = (env->CP0_Cause & 0xFCC0FF7C) | (T0 & mask); /* Handle the software interrupt as an hardware one, as they are very similar */ |