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-rw-r--r--target/riscv/csr.c24
1 files changed, 0 insertions, 24 deletions
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index fe5628f..62b9683 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -215,11 +215,6 @@ static RISCVException epmp(CPURISCVState *env, int csrno)
static RISCVException read_fflags(CPURISCVState *env, int csrno,
target_ulong *val)
{
-#if !defined(CONFIG_USER_ONLY)
- if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
-#endif
*val = riscv_cpu_get_fflags(env);
return RISCV_EXCP_NONE;
}
@@ -228,9 +223,6 @@ static RISCVException write_fflags(CPURISCVState *env, int csrno,
target_ulong val)
{
#if !defined(CONFIG_USER_ONLY)
- if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
env->mstatus |= MSTATUS_FS;
#endif
riscv_cpu_set_fflags(env, val & (FSR_AEXC >> FSR_AEXC_SHIFT));
@@ -240,11 +232,6 @@ static RISCVException write_fflags(CPURISCVState *env, int csrno,
static RISCVException read_frm(CPURISCVState *env, int csrno,
target_ulong *val)
{
-#if !defined(CONFIG_USER_ONLY)
- if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
-#endif
*val = env->frm;
return RISCV_EXCP_NONE;
}
@@ -253,9 +240,6 @@ static RISCVException write_frm(CPURISCVState *env, int csrno,
target_ulong val)
{
#if !defined(CONFIG_USER_ONLY)
- if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
env->mstatus |= MSTATUS_FS;
#endif
env->frm = val & (FSR_RD >> FSR_RD_SHIFT);
@@ -265,11 +249,6 @@ static RISCVException write_frm(CPURISCVState *env, int csrno,
static RISCVException read_fcsr(CPURISCVState *env, int csrno,
target_ulong *val)
{
-#if !defined(CONFIG_USER_ONLY)
- if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
-#endif
*val = (riscv_cpu_get_fflags(env) << FSR_AEXC_SHIFT)
| (env->frm << FSR_RD_SHIFT);
if (vs(env, csrno) >= 0) {
@@ -283,9 +262,6 @@ static RISCVException write_fcsr(CPURISCVState *env, int csrno,
target_ulong val)
{
#if !defined(CONFIG_USER_ONLY)
- if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
- return RISCV_EXCP_ILLEGAL_INST;
- }
env->mstatus |= MSTATUS_FS;
#endif
env->frm = (val & FSR_RD) >> FSR_RD_SHIFT;