diff options
| -rw-r--r-- | hw/lm32/lm32_boards.c | 4 | ||||
| -rw-r--r-- | hw/lm32/milkymist.c | 2 | ||||
| -rw-r--r-- | target/lm32/cpu.h | 3 | ||||
| -rw-r--r-- | target/lm32/helper.c | 5 |
4 files changed, 4 insertions, 10 deletions
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index 8f0c307..eccf0ac 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -104,7 +104,7 @@ static void lm32_evr_init(MachineState *machine) if (cpu_model == NULL) { cpu_model = "lm32-full"; } - cpu = cpu_lm32_init(cpu_model); + cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); @@ -205,7 +205,7 @@ static void lm32_uclinux_init(MachineState *machine) if (cpu_model == NULL) { cpu_model = "lm32-full"; } - cpu = cpu_lm32_init(cpu_model); + cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index 5cae0f1..dffd879 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -111,7 +111,7 @@ milkymist_init(MachineState *machine) if (cpu_model == NULL) { cpu_model = "lm32-full"; } - cpu = cpu_lm32_init(cpu_model); + cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu == NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index 1d972cb..de265b5 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -238,7 +238,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx) return (dc >> (idx+1)*2) & 0x3; } -LM32CPU *cpu_lm32_init(const char *cpu_model); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -256,7 +255,7 @@ void lm32_watchpoint_insert(CPULM32State *env, int index, target_ulong address, void lm32_watchpoint_remove(CPULM32State *env, int index); bool lm32_cpu_do_semihosting(CPUState *cs); -#define cpu_init(cpu_model) CPU(cpu_lm32_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model) #define cpu_list lm32_cpu_list #define cpu_signal_handler cpu_lm32_signal_handler diff --git a/target/lm32/helper.c b/target/lm32/helper.c index 891da18..929cc36 100644 --- a/target/lm32/helper.c +++ b/target/lm32/helper.c @@ -219,11 +219,6 @@ bool lm32_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } -LM32CPU *cpu_lm32_init(const char *cpu_model) -{ - return LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); -} - /* Some soc ignores the MSB on the address bus. Thus creating a shadow memory * area. As a general rule, 0x00000000-0x7fffffff is cached, whereas * 0x80000000-0xffffffff is not cached and used to access IO devices. */ |