diff options
| -rw-r--r-- | cpu-exec.c | 4 | ||||
| -rw-r--r-- | exec.c | 2 | ||||
| -rw-r--r-- | hw/i386/kvmvapic.c | 2 | ||||
| -rw-r--r-- | include/exec/exec-all.h | 2 | ||||
| -rw-r--r-- | target-i386/helper.c | 2 | ||||
| -rw-r--r-- | target-lm32/helper.c | 2 | ||||
| -rw-r--r-- | target-xtensa/helper.c | 2 | ||||
| -rw-r--r-- | translate-all.c | 6 | ||||
| -rw-r--r-- | user-exec.c | 3 |
9 files changed, 11 insertions, 14 deletions
@@ -33,10 +33,8 @@ void cpu_loop_exit(CPUState *cpu) restored in a state compatible with the CPU emulator */ #if defined(CONFIG_SOFTMMU) -void cpu_resume_from_signal(CPUArchState *env, void *puc) +void cpu_resume_from_signal(CPUState *cpu, void *puc) { - CPUState *cpu = ENV_GET_CPU(env); - /* XXX: restore cpu registers saved in host registers */ cpu->exception_index = -1; @@ -1608,7 +1608,7 @@ static void check_watchpoint(int offset, int len_mask, int flags) } else { cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); tb_gen_code(cpu, pc, cs_base, cpu_flags, 1); - cpu_resume_from_signal(env, NULL); + cpu_resume_from_signal(cpu, NULL); } } } else { diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 2a9d87a..a1c3d1c 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -449,7 +449,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) if (!kvm_enabled()) { cs->current_tb = NULL; tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1); - cpu_resume_from_signal(env, NULL); + cpu_resume_from_signal(cs, NULL); } } diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index a3e7faa..01b8eba 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -83,7 +83,7 @@ int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb, bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc); void page_size_init(void); -void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc); +void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc); void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, target_ulong cs_base, int flags, diff --git a/target-i386/helper.c b/target-i386/helper.c index ad61062..8c70d62 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1102,7 +1102,7 @@ void breakpoint_handler(CPUX86State *env) if (check_hw_breakpoints(env, false)) { raise_exception(env, EXCP01_DB); } else { - cpu_resume_from_signal(env, NULL); + cpu_resume_from_signal(cs, NULL); } } } else { diff --git a/target-lm32/helper.c b/target-lm32/helper.c index 8be5bed..7de783b 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -135,7 +135,7 @@ void lm32_debug_excp_handler(CPULM32State *env) if (check_watchpoints(env)) { raise_exception(env, EXCP_WATCHPOINT); } else { - cpu_resume_from_signal(env, NULL); + cpu_resume_from_signal(cs, NULL); } } } else { diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 8a9cb0a..94dcd94 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -92,7 +92,7 @@ void xtensa_breakpoint_handler(CPUXtensaState *env) if (cause) { debug_exception_env(env, cause); } - cpu_resume_from_signal(env, NULL); + cpu_resume_from_signal(cs, NULL); } } } diff --git a/translate-all.c b/translate-all.c index df85f9f..0aa4f76 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1113,7 +1113,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, itself */ cpu->current_tb = NULL; tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1); - cpu_resume_from_signal(env, NULL); + cpu_resume_from_signal(cpu, NULL); } #endif } @@ -1213,7 +1213,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr, if (locked) { mmap_unlock(); } - cpu_resume_from_signal(env, puc); + cpu_resume_from_signal(cpu, puc); } #endif } @@ -1476,7 +1476,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) repeating the fault, which is horribly inefficient. Better would be to execute just this insn uncached, or generate a second new TB. */ - cpu_resume_from_signal(env, NULL); + cpu_resume_from_signal(cpu, NULL); } void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr) diff --git a/user-exec.c b/user-exec.c index 75c6d54..3b795c1 100644 --- a/user-exec.c +++ b/user-exec.c @@ -52,9 +52,8 @@ static void exception_action(CPUArchState *env1) /* exit the current TB from a signal handler. The host registers are restored in a state compatible with the CPU emulator */ -void cpu_resume_from_signal(CPUArchState *env1, void *puc) +void cpu_resume_from_signal(CPUState *cpu, void *puc) { - CPUState *cpu = ENV_GET_CPU(env1); #ifdef __linux__ struct ucontext *uc = puc; #elif defined(__OpenBSD__) |