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author | Peter Maydell <peter.maydell@linaro.org> | 2022-07-14 14:23:02 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2022-07-18 13:20:13 +0100 |
commit | cb4a0a3444dc25fc5d69603ef098020a8767c6a0 (patch) | |
tree | 2fb9053b35c48d2667e1d89c6d4bc53f5cdc3953 /util/qemu-timer.c | |
parent | 988cc1909f2895cb751fc9cc83ba51938be02183 (diff) | |
download | qemu-cb4a0a3444dc25fc5d69603ef098020a8767c6a0.zip qemu-cb4a0a3444dc25fc5d69603ef098020a8767c6a0.tar.gz qemu-cb4a0a3444dc25fc5d69603ef098020a8767c6a0.tar.bz2 |
target/arm: Store TCR_EL* registers as uint64_t
Change the representation of the TCR_EL* registers in the CPU state
struct from struct TCR to uint64_t. This allows us to drop the
custom vmsa_ttbcr_raw_write() function, moving the "enforce RES0"
checks to their more usual location in the writefn
vmsa_ttbcr_write(). We also don't need the resetfn any more.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220714132303.1287193-7-peter.maydell@linaro.org
Diffstat (limited to 'util/qemu-timer.c')
0 files changed, 0 insertions, 0 deletions