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author | Claudio Fontana <cfontana@suse.de> | 2021-06-03 14:30:00 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-06-04 13:47:08 +0200 |
commit | 662175b91ff2c0d56f709345b0bf9534ec2a218d (patch) | |
tree | 10d70609582ee6ce30bdf526522a454fa430c98d /util/nvdimm-utils.c | |
parent | 6b731a96aa743a4d384197acb4a6038efbb492b4 (diff) | |
download | qemu-662175b91ff2c0d56f709345b0bf9534ec2a218d.zip qemu-662175b91ff2c0d56f709345b0bf9534ec2a218d.tar.gz qemu-662175b91ff2c0d56f709345b0bf9534ec2a218d.tar.bz2 |
i386: reorder call to cpu_exec_realizefn
i386 realizefn code is sensitive to ordering, and recent commits
aimed at refactoring it, splitting accelerator-specific code,
broke assumptions which need to be fixed.
We need to:
* process hyper-v enlightements first, as they assume features
not to be expanded
* only then, expand features
* after expanding features, attempt to check them and modify them in the
accel-specific realizefn code called by cpu_exec_realizefn().
* after the framework has been called via cpu_exec_realizefn,
the code can check for what has or hasn't been set by accel-specific
code, or extend its results, ie:
- check and evenually set code_urev default
- modify cpu->mwait after potentially being set from host CPUID.
- finally check for phys_bits assuming all user and accel-specific
adjustments have already been taken into account.
Fixes: f5cc5a5c ("i386: split cpu accelerators from cpu.c"...)
Fixes: 30565f10 ("cpu: call AccelCPUClass::cpu_realizefn in"...)
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210603123001.17843-2-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'util/nvdimm-utils.c')
0 files changed, 0 insertions, 0 deletions