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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-12-12 10:38:21 -0600 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-01-07 05:09:41 -1000 |
| commit | 1da8de39a39c55560cb4bf0cea94d598fea035cd (patch) | |
| tree | 59d8b4160b3342019ef5fd8c1392af7812de0713 /util/cacheinfo.c | |
| parent | df5d2b1658b988cb2be557e9f3114115935506ef (diff) | |
| download | qemu-1da8de39a39c55560cb4bf0cea94d598fea035cd.zip qemu-1da8de39a39c55560cb4bf0cea94d598fea035cd.tar.gz qemu-1da8de39a39c55560cb4bf0cea94d598fea035cd.tar.bz2 | |
util: Enhance flush_icache_range with separate data pointer
We are shortly going to have a split rw/rx jit buffer. Depending
on the host, we need to flush the dcache at the rw data pointer and
flush the icache at the rx code pointer.
For now, the two passed pointers are identical, so there is no
effective change in behaviour.
Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'util/cacheinfo.c')
| -rw-r--r-- | util/cacheinfo.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/util/cacheinfo.c b/util/cacheinfo.c index 7804c18..b182f0b 100644 --- a/util/cacheinfo.c +++ b/util/cacheinfo.c @@ -166,9 +166,11 @@ static void fallback_cache_info(int *isize, int *dsize) *isize = *dsize; } else { #if defined(_ARCH_PPC) - /* For PPC, we're going to use the icache size computed for - flush_icache_range. Which means that we must use the - architecture minimum. */ + /* + * For PPC, we're going to use the cache sizes computed for + * flush_idcache_range. Which means that we must use the + * architecture minimum. + */ *isize = *dsize = 16; #else /* Otherwise, 64 bytes is not uncommon. */ |