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author | Peter Maydell <peter.maydell@linaro.org> | 2020-09-01 16:51:37 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-01 16:51:37 +0100 |
commit | 8d90bfc5c31ad60f6049dd39be636b06bc00b652 (patch) | |
tree | 5af66a13ed5b0057351741ae6c548458b8728e08 /ui | |
parent | 071a6dba7d4db57e28f659b30829b1c22b945f4e (diff) | |
parent | 3f462bf0f6ea6382dd1502d4eb1fcd33c8e774f5 (diff) | |
download | qemu-8d90bfc5c31ad60f6049dd39be636b06bc00b652.zip qemu-8d90bfc5c31ad60f6049dd39be636b06bc00b652.tar.gz qemu-8d90bfc5c31ad60f6049dd39be636b06bc00b652.tar.bz2 |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200901' into staging
target-arm queue:
* Implement fp16 support for AArch32 VFP and Neon
* hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
* hw/arm/sbsa-ref : Add embedded controller in secure memory
# gpg: Signature made Tue 01 Sep 2020 16:17:23 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200901: (47 commits)
hw/arm/sbsa-ref : Add embedded controller in secure memory
hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref
hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
target/arm: Enable FP16 in '-cpu max'
target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS
target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations
target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations
target/arm: Implement fp16 for Neon VRINTX
target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode
target/arm: Implement fp16 for Neon VCVT with rounding modes
target/arm: Implement fp16 for Neon VCVT fixed-point
target/arm: Convert Neon VCVT fixed-point to gvec
target/arm: Implement fp16 for Neon float-integer VCVT
target/arm: Implement fp16 for Neon pairwise fp ops
target/arm: Implement fp16 for Neon VRSQRTS
target/arm: Implement fp16 for Neon VRECPS
target/arm: Implement fp16 for Neon fp compare-vs-0
target/arm: Implement fp16 for Neon VFMA, VMFS
target/arm: Implement fp16 for Neon VMLA, VMLS operations
target/arm: Implement fp16 for Neon VMAXNM, VMINNM
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'ui')
0 files changed, 0 insertions, 0 deletions