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| author | Tom Musta <tommusta@gmail.com> | 2014-12-18 10:34:31 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2015-01-07 16:16:27 +0100 |
| commit | 69d1a9377453d78ba2279fa56ae9623b3cd98673 (patch) | |
| tree | 3ee55988add9762fc51e3504e352b0f703b32f2d /ui | |
| parent | e43668a7d20e5d2dfe92b2f3426280b2a351333c (diff) | |
| download | qemu-69d1a9377453d78ba2279fa56ae9623b3cd98673.zip qemu-69d1a9377453d78ba2279fa56ae9623b3cd98673.tar.gz qemu-69d1a9377453d78ba2279fa56ae9623b3cd98673.tar.bz2 | |
target-ppc: Introduce tm_enabled Bit to CPU State
Add a bit (tm_enabled) to CPU state that mirrors the MSR[TM] bit.
This is analogous to the other "available" bits in the MSR (FP,
VSX, etc.).
NOTE: Since MSR[TM] occupies big-endian bit 31, the code is wrapped
with a PPC64 bit check.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'ui')
0 files changed, 0 insertions, 0 deletions