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| author | Anup Patel <anup.patel@wdc.com> | 2022-02-04 23:16:38 +0530 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-02-16 12:24:18 +1000 |
| commit | 881df35d3df52efd845087fb76d0b0116b366468 (patch) | |
| tree | 23bafdc3a858e85f202e86f79ba2618d9e364fca /ui/sdl2.c | |
| parent | dceecac8a2fa36f6ab6927da2052f06e2de7a2a4 (diff) | |
| download | qemu-881df35d3df52efd845087fb76d0b0116b366468.zip qemu-881df35d3df52efd845087fb76d0b0116b366468.tar.gz qemu-881df35d3df52efd845087fb76d0b0116b366468.tar.bz2 | |
target/riscv: Implement SGEIP bit in hip and hie CSRs
A hypervisor can optionally take guest external interrupts using
SGEIP bit of hip and hie CSRs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Message-id: 20220204174700.534953-3-anup@brainfault.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'ui/sdl2.c')
0 files changed, 0 insertions, 0 deletions