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authorPeter Maydell <peter.maydell@linaro.org>2020-01-30 16:19:04 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-01-30 16:19:04 +0000
commit928173659d6e5dc368284f73f90ea1d129e1f57d (patch)
treea7c20f44a7f47478a8b475fb42609af5d2977f64 /tests
parent204aa60b37c23a89e690d418f49787d274303ca7 (diff)
parentdea101a1ae9968c9fec6ab0291489dad7c49f36f (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200130' into staging
target-arm queue: * hw/core/or-irq: Fix incorrect assert forbidding num-lines == MAX_OR_LINES * target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr * aspeed: some minor bugfixes * aspeed: add eMMC controller model for AST2600 SoC * hw/arm/raspi: Remove obsolete use of -smp to set the soc 'enabled-cpus' * New 3-phase reset API for device models * hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit * Arm KVM: stop/restart the guest counter when the VM is stopped and started # gpg: Signature made Thu 30 Jan 2020 16:14:45 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200130: (26 commits) target/arm/cpu: Add the kvm-no-adjvtime CPU property target/arm/kvm: Implement virtual time adjustment tests/arm-cpu-features: Check feature default values target/arm/kvm64: kvm64 cpus have timer registers hw/arm/virt: Add missing 5.0 options call to 4.2 options target/arm/kvm: trivial: Clean up header documentation hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit hw/s390x/ipl: replace deprecated qdev_reset_all registration vl: replace deprecated qbus_reset_all registration docs/devel/reset.rst: add doc about Resettable interface hw/core: deprecate old reset functions and introduce new ones hw/core/qdev: update hotplug reset regarding resettable hw/core/qdev: handle parent bus change regarding resettable hw/core/resettable: add support for changing parent hw/core: add Resettable support to BusClass and DeviceClass hw/core: create Resettable QOM interface hw/core/qdev: add trace events to help with resettable transition add device_legacy_reset function to prepare for reset api change hw/arm/raspi: Remove obsolete use of -smp to set the soc 'enabled-cpus' misc/pca9552: Add qom set and get ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
-rw-r--r--tests/Makefile.include1
-rw-r--r--tests/qtest/arm-cpu-features.c41
2 files changed, 33 insertions, 9 deletions
diff --git a/tests/Makefile.include b/tests/Makefile.include
index c6827ce..a1bff5d 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -429,6 +429,7 @@ tests/fp/%:
tests/test-qdev-global-props$(EXESUF): tests/test-qdev-global-props.o \
hw/core/qdev.o hw/core/qdev-properties.o hw/core/hotplug.o\
hw/core/bus.o \
+ hw/core/resettable.o \
hw/core/irq.o \
hw/core/fw-path-provider.o \
hw/core/reset.o \
diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
index bef3ed2..4692173 100644
--- a/tests/qtest/arm-cpu-features.c
+++ b/tests/qtest/arm-cpu-features.c
@@ -159,6 +159,25 @@ static bool resp_get_feature(QDict *resp, const char *feature)
qobject_unref(_resp); \
})
+#define assert_feature(qts, cpu_type, feature, expected_value) \
+({ \
+ QDict *_resp, *_props; \
+ \
+ _resp = do_query_no_props(qts, cpu_type); \
+ g_assert(_resp); \
+ g_assert(resp_has_props(_resp)); \
+ _props = resp_get_props(_resp); \
+ g_assert(qdict_get(_props, feature)); \
+ g_assert(qdict_get_bool(_props, feature) == (expected_value)); \
+ qobject_unref(_resp); \
+})
+
+#define assert_has_feature_enabled(qts, cpu_type, feature) \
+ assert_feature(qts, cpu_type, feature, true)
+
+#define assert_has_feature_disabled(qts, cpu_type, feature) \
+ assert_feature(qts, cpu_type, feature, false)
+
static void assert_type_full(QTestState *qts)
{
const char *error;
@@ -405,16 +424,18 @@ static void test_query_cpu_model_expansion(const void *data)
assert_error(qts, "host", "The CPU type 'host' requires KVM", NULL);
/* Test expected feature presence/absence for some cpu types */
- assert_has_feature(qts, "max", "pmu");
- assert_has_feature(qts, "cortex-a15", "pmu");
+ assert_has_feature_enabled(qts, "max", "pmu");
+ assert_has_feature_enabled(qts, "cortex-a15", "pmu");
assert_has_not_feature(qts, "cortex-a15", "aarch64");
+ assert_has_not_feature(qts, "max", "kvm-no-adjvtime");
+
if (g_str_equal(qtest_get_arch(), "aarch64")) {
- assert_has_feature(qts, "max", "aarch64");
- assert_has_feature(qts, "max", "sve");
- assert_has_feature(qts, "max", "sve128");
- assert_has_feature(qts, "cortex-a57", "pmu");
- assert_has_feature(qts, "cortex-a57", "aarch64");
+ assert_has_feature_enabled(qts, "max", "aarch64");
+ assert_has_feature_enabled(qts, "max", "sve");
+ assert_has_feature_enabled(qts, "max", "sve128");
+ assert_has_feature_enabled(qts, "cortex-a57", "pmu");
+ assert_has_feature_enabled(qts, "cortex-a57", "aarch64");
sve_tests_default(qts, "max");
@@ -443,6 +464,8 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
return;
}
+ assert_has_feature_disabled(qts, "host", "kvm-no-adjvtime");
+
if (g_str_equal(qtest_get_arch(), "aarch64")) {
bool kvm_supports_sve;
char max_name[8], name[8];
@@ -451,8 +474,8 @@ static void test_query_cpu_model_expansion_kvm(const void *data)
QDict *resp;
char *error;
- assert_has_feature(qts, "host", "aarch64");
- assert_has_feature(qts, "host", "pmu");
+ assert_has_feature_enabled(qts, "host", "aarch64");
+ assert_has_feature_enabled(qts, "host", "pmu");
assert_error(qts, "cortex-a15",
"We cannot guarantee the CPU type 'cortex-a15' works "