Merge tag 'pull-hex-20240807' of https://github.com/quic/qemu into staging

Hexagon updates: lldb preds, v66 CPU, F2_conv* fix

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCgAdFiEEPWaq5HRZSCTIjOD4GlSvuOVkbDIFAma0PggACgkQGlSvuOVk
# bDK5wxAAnFin9dlEeoy4N0HOhF4l3+t0P47w0JhceL0ZXpyOb+aLDoVBaXCPSvys
# MOHUbBqDgtGoAE4GxfLvsPvaAE3HnvCwRQQmscALHKLB2M3ntb9uIDhxoodi+ehY
# X8fJ3+EqlKqRdp2fhOMf1hEvRn9SN2fXZ9uF9FvP2rZimrZdYC2Wc4wc8gQH4mlz
# DOibUNbRhitndpAZJaSoCPwGcse//39EG9fwR8PAsGoQf6g6abmwtvuh3HFOrSLD
# jYqX9wNfbilbntD1Mhsn9mbP/62fmgO/HO92PvSaShWkA6lOrdRm5q3EbZQA7qgM
# 95brcDqInj7pC0bLJ1fb1HwHq2QPUuGX+zuMB9finTn/87hu6uR2yf790UAQILKE
# w93FzenC+OeHJ9YytfCJMbKjW/L7eAamx0qkd+qazD1+bNERF8zBkzVfJs1u4K4A
# EbSKlW3wtlXDDm78Oz6Rk+Oq8Hz4AC6N9XSS/zhV8lrzcfyrgIdaTrr2/jYHpinh
# vENT19WSZBMthEKcsZc959igMFvM4GXUfob+3GIx8WlT0dt59fQZ8zRbizzDlKzp
# uK+Lwyds+UjgCUaDwdy9YGB1WaF14imDo79yho7EDCkDDjskMASCZxGmDgB939US
# 0ZBIU7gqqXBpzuMNF8yyCgowD61oRBwf9eVUyqS6B6hscbikSpo=
# =mizO
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 08 Aug 2024 01:39:52 PM AEST
# gpg:                using RSA key 3D66AAE474594824C88CE0F81A54AFB8E5646C32
# gpg: Good signature from "Brian Cain (QUIC) <quic_bcain@quicinc.com>" [unknown]
# gpg:                 aka "Brian Cain <bcain@kernel.org>" [unknown]
# gpg:                 aka "Brian Cain (QuIC) <bcain@quicinc.com>" [unknown]
# gpg:                 aka "Brian Cain (CAF) <bcain@codeaurora.org>" [unknown]
# gpg:                 aka "bcain" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6350 20F9 67A7 7164 79EF  49E0 175C 464E 541B 6D47
#      Subkey fingerprint: 3D66 AAE4 7459 4824 C88C  E0F8 1A54 AFB8 E564 6C32

* tag 'pull-hex-20240807' of https://github.com/quic/qemu:
  target/hexagon: switch to dc set_props() list
  target/hexagon: define a v66 CPU
  MAINTAINERS: Add my hexagon git tree
  target/hexagon/idef-parser: Remove self-assignment
  Hexagon: lldb read/write predicate registers p0/p1/p2/p3
  Hexagon: fix F2_conv_* instructions for negative zero

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

1 files changed, 11 insertions, 1 deletions

diff --git a/tests/tcg/hexagon/usr.c b/tests/tcg/hexagon/usr.c
index 92bc86a..f0b23d3 100644
--- a/tests/tcg/hexagon/usr.c
+++ b/tests/tcg/hexagon/usr.c
@@ -1,5 +1,5 @@
 /*
- *  Copyright(c) 2022-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *  Copyright(c) 2022-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -1007,6 +1007,11 @@ int main()
     TEST_P_OP_R(conv_sf2d_chop,   SF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
     TEST_P_OP_R(conv_sf2d_chop,   SF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
 
+    TEST_R_OP_R(conv_sf2uw,       SF_zero_neg,  0, USR_CLEAR);
+    TEST_R_OP_R(conv_sf2uw_chop,  SF_zero_neg,  0, USR_CLEAR);
+    TEST_P_OP_R(conv_sf2ud,       SF_zero_neg,  0, USR_CLEAR);
+    TEST_P_OP_R(conv_sf2ud_chop,  SF_zero_neg,  0, USR_CLEAR);
+
     TEST_R_OP_P(conv_df2sf,       DF_QNaN,  SF_HEX_NaN,             USR_CLEAR);
     TEST_R_OP_P(conv_df2sf,       DF_SNaN,  SF_HEX_NaN,             USR_FPINVF);
     TEST_R_OP_P(conv_df2uw,       DF_QNaN,  0xffffffff,             USR_FPINVF);
@@ -1020,6 +1025,11 @@ int main()
     TEST_R_OP_P(conv_df2uw_chop,  DF_QNaN,  0xffffffff,             USR_FPINVF);
     TEST_R_OP_P(conv_df2uw_chop,  DF_SNaN,  0xffffffff,             USR_FPINVF);
 
+    TEST_R_OP_P(conv_df2uw,       DF_zero_neg,  0, USR_CLEAR);
+    TEST_R_OP_P(conv_df2uw_chop,  DF_zero_neg,  0, USR_CLEAR);
+    TEST_P_OP_P(conv_df2ud,       DF_zero_neg,  0, USR_CLEAR);
+    TEST_P_OP_P(conv_df2ud_chop,  DF_zero_neg,  0, USR_CLEAR);
+
     /* Test for typo in HELPER(conv_df2uw_chop) */
     TEST_R_OP_P(conv_df2uw_chop, 0xffffff7f00000001ULL, 0xffffffff, USR_FPINVF);