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authorFredrik Noring <noring@nocrew.org>2018-10-21 17:41:13 +0200
committerAleksandar Markovic <amarkovic@wavecomp.com>2018-10-24 15:20:31 +0200
commit667eded27024618422ca7e530d6dd4902fedc49f (patch)
treecabef00f4859a290263e83097f963cfac8a0dd01 /tests
parent9d35580a577ceac602d6a5bc9a7368196f381855 (diff)
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tests/tcg/mips: Add tests for R5900 three-operand MULTU
Add a test for MULTU. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/tcg/mips/mipsr5900/Makefile1
-rw-r--r--tests/tcg/mips/mipsr5900/multu.c39
2 files changed, 40 insertions, 0 deletions
diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/Makefile
index 6757168..b3ddb9a 100644
--- a/tests/tcg/mips/mipsr5900/Makefile
+++ b/tests/tcg/mips/mipsr5900/Makefile
@@ -9,6 +9,7 @@ CC = $(CROSS)gcc
CFLAGS = -Wall -mabi=32 -march=r5900 -static
TESTCASES = mult.tst
+TESTCASES += multu.tst
all: $(TESTCASES)
diff --git a/tests/tcg/mips/mipsr5900/multu.c b/tests/tcg/mips/mipsr5900/multu.c
new file mode 100644
index 0000000..3a59675
--- /dev/null
+++ b/tests/tcg/mips/mipsr5900/multu.c
@@ -0,0 +1,39 @@
+/*
+ * Test R5900-specific three-operand MULTU.
+ */
+
+#include <stdio.h>
+#include <inttypes.h>
+#include <assert.h>
+
+static uint64_t multu(uint32_t rs, uint32_t rt)
+{
+ uint32_t rd, lo, hi;
+ uint64_t r;
+
+ __asm__ __volatile__ (
+ " multu %0, %3, %4\n"
+ " mflo %1\n"
+ " mfhi %2\n"
+ : "=r" (rd), "=r" (lo), "=r" (hi)
+ : "r" (rs), "r" (rt));
+ r = ((uint64_t)hi << 32) | (uint32_t)lo;
+
+ assert((uint64_t)rs * rt == r);
+ assert(rd == lo);
+
+ return r;
+}
+
+int main()
+{
+ assert(multu(17, 19) == 323);
+ assert(multu(77773, 99991) == 7776600043);
+ assert(multu(12207031, 305175781) == 3725290219116211);
+
+ assert(multu(0x80000000U, 0x7FFFFFFF) == 0x3FFFFFFF80000000);
+ assert(multu(0x80000000U, 0x80000000U) == 0x4000000000000000);
+ assert(multu(0xFFFFFFFFU, 0xFFFFFFFFU) == 0xFFFFFFFE00000001U);
+
+ return 0;
+}