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| author | Ilya Leoshkevich <iii@linux.ibm.com> | 2024-01-11 10:21:27 +0100 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2024-01-11 14:13:07 +0100 |
| commit | 2bcc91ecea99bd559fa551d80e6321027e01106d (patch) | |
| tree | 41c33916692dab3c09fdd08d56c006d998821468 /tests/tcg | |
| parent | e358a25a97c71c39e3513d9b869cdb82052e50b8 (diff) | |
| download | qemu-2bcc91ecea99bd559fa551d80e6321027e01106d.zip qemu-2bcc91ecea99bd559fa551d80e6321027e01106d.tar.gz qemu-2bcc91ecea99bd559fa551d80e6321027e01106d.tar.bz2 | |
tests/tcg/s390x: Test LOAD ADDRESS EXTENDED
Add a small test to prevent regressions. Userspace runs in primary
mode, so LAE should always set the access register to 0.
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-ID: <20240111092328.929421-3-iii@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'tests/tcg')
| -rw-r--r-- | tests/tcg/s390x/Makefile.target | 1 | ||||
| -rw-r--r-- | tests/tcg/s390x/lae.c | 31 |
2 files changed, 32 insertions, 0 deletions
diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target index 0e670f3..30994dc 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -44,6 +44,7 @@ TESTS+=clgebr TESTS+=clc TESTS+=laalg TESTS+=add-logical-with-carry +TESTS+=lae cdsg: CFLAGS+=-pthread cdsg: LDFLAGS+=-pthread diff --git a/tests/tcg/s390x/lae.c b/tests/tcg/s390x/lae.c new file mode 100644 index 0000000..59712b5 --- /dev/null +++ b/tests/tcg/s390x/lae.c @@ -0,0 +1,31 @@ +/* + * Test the LOAD ADDRESS EXTENDED instruction. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include <assert.h> +#include <stdlib.h> + +int main(void) +{ + unsigned long long ar = -1, b2 = 100000, r, x2 = 500; + /* + * Hardcode the register number, since clang does not allow using %rN in + * place of %aN. + */ + register unsigned long long r2 __asm__("2"); + int tmp; + + asm("ear %[tmp],%%a2\n" + "lae %%r2,42(%[x2],%[b2])\n" + "ear %[ar],%%a2\n" + "sar %%a2,%[tmp]" + : [tmp] "=&r" (tmp), "=&r" (r2), [ar] "+r" (ar) + : [b2] "r" (b2), [x2] "r" (x2) + : "memory"); + r = r2; + assert(ar == 0xffffffff00000000ULL); + assert(r == 100542); + + return EXIT_SUCCESS; +} |