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author | Peter Maydell <peter.maydell@linaro.org> | 2023-11-06 15:00:27 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2023-11-06 15:00:27 +0000 |
commit | 806f71eecf643d029099e57fae2199f678845d98 (patch) | |
tree | 395ef292b734f78712c9a782b3dce3255c426d6b /tests/data | |
parent | 41f7b58b634ec3b60ae874375d2bbb61d790971e (diff) | |
download | qemu-806f71eecf643d029099e57fae2199f678845d98.zip qemu-806f71eecf643d029099e57fae2199f678845d98.tar.gz qemu-806f71eecf643d029099e57fae2199f678845d98.tar.bz2 |
tests/qtest/bios-tables-test: Update virt SPCR and DBG2 golden references
Update the virt SPCR and DBG2 golden reference files to have the
fix for the description of the UART.
Diffs from iasl:
@@ -1,57 +1,57 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Fri Nov 3 14:12:06 2023
+ * Disassembly of /tmp/aml-E6YUD2, Fri Nov 3 14:12:06 2023
*
* ACPI Data Table [SPCR]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "SPCR" [Serial Port Console Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : CB
+[009h 0009 1] Checksum : B1
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 1] Interface Type : 03
[025h 0037 3] Reserved : 000000
[028h 0040 12] Serial Port Register : [Generic Address Structure]
[028h 0040 1] Space ID : 00 [SystemMemory]
-[029h 0041 1] Bit Width : 08
+[029h 0041 1] Bit Width : 20
[02Ah 0042 1] Bit Offset : 00
-[02Bh 0043 1] Encoded Access Width : 01 [Byte Access:8]
+[02Bh 0043 1] Encoded Access Width : 03 [DWord Access:32]
[02Ch 0044 8] Address : 0000000009000000
[034h 0052 1] Interrupt Type : 08
[035h 0053 1] PCAT-compatible IRQ : 00
[036h 0054 4] Interrupt : 00000021
[03Ah 0058 1] Baud Rate : 03
[03Bh 0059 1] Parity : 00
[03Ch 0060 1] Stop Bits : 01
[03Dh 0061 1] Flow Control : 02
[03Eh 0062 1] Terminal Type : 00
[04Ch 0076 1] Reserved : 00
[040h 0064 2] PCI Device ID : FFFF
[042h 0066 2] PCI Vendor ID : FFFF
[044h 0068 1] PCI Bus : 00
[045h 0069 1] PCI Device : 00
[046h 0070 1] PCI Function : 00
[047h 0071 4] PCI Flags : 00000000
[04Bh 0075 1] PCI Segment : 00
[04Ch 0076 4] Reserved : 00000000
Raw Table Data: Length 80 (0x50)
- 0000: 53 50 43 52 50 00 00 00 02 CB 42 4F 43 48 53 20 // SPCRP.....BOCHS
+ 0000: 53 50 43 52 50 00 00 00 02 B1 42 4F 43 48 53 20 // SPCRP.....BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 03 00 00 00 00 08 00 01 00 00 00 09 // ................
+ 0020: 01 00 00 00 03 00 00 00 00 20 00 03 00 00 00 09 // ......... ......
0030: 00 00 00 00 08 00 21 00 00 00 03 00 01 02 00 00 // ......!.........
0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................
@@ -1,57 +1,57 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/DBG2, Fri Nov 3 14:12:06 2023
+ * Disassembly of /tmp/aml-V1YUD2, Fri Nov 3 14:12:06 2023
*
* ACPI Data Table [DBG2]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "DBG2" [Debug Port table type 2]
[004h 0004 4] Table Length : 00000057
[008h 0008 1] Revision : 00
-[009h 0009 1] Checksum : CF
+[009h 0009 1] Checksum : B5
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Info Offset : 0000002C
[028h 0040 4] Info Count : 00000001
[02Ch 0044 1] Revision : 00
[02Dh 0045 2] Length : 002B
[02Fh 0047 1] Register Count : 01
[030h 0048 2] Namepath Length : 0005
[032h 0050 2] Namepath Offset : 0026
[034h 0052 2] OEM Data Length : 0000 [Optional field not present]
[036h 0054 2] OEM Data Offset : 0000 [Optional field not present]
[038h 0056 2] Port Type : 8000
[03Ah 0058 2] Port Subtype : 0003
[03Ch 0060 2] Reserved : 0000
[03Eh 0062 2] Base Address Offset : 0016
[040h 0064 2] Address Size Offset : 0022
[042h 0066 12] Base Address Register : [Generic Address Structure]
[042h 0066 1] Space ID : 00 [SystemMemory]
-[043h 0067 1] Bit Width : 08
+[043h 0067 1] Bit Width : 20
[044h 0068 1] Bit Offset : 00
-[045h 0069 1] Encoded Access Width : 01 [Byte Access:8]
+[045h 0069 1] Encoded Access Width : 03 [DWord Access:32]
[046h 0070 8] Address : 0000000009000000
[04Eh 0078 4] Address Size : 00001000
[052h 0082 5] Namepath : "COM0"
Raw Table Data: Length 87 (0x57)
- 0000: 44 42 47 32 57 00 00 00 00 CF 42 4F 43 48 53 20 // DBG2W.....BOCHS
+ 0000: 44 42 47 32 57 00 00 00 00 B5 42 4F 43 48 53 20 // DBG2W.....BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 2C 00 00 00 01 00 00 00 00 2B 00 01 // ....,........+..
0030: 05 00 26 00 00 00 00 00 00 80 03 00 00 00 16 00 // ..&.............
- 0040: 22 00 00 08 00 01 00 00 00 09 00 00 00 00 00 10 // "...............
+ 0040: 22 00 00 20 00 03 00 00 00 09 00 00 00 00 00 10 // ".. ............
0050: 00 00 43 4F 4D 30 00 // ..COM0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/data')
-rw-r--r-- | tests/data/acpi/virt/DBG2 | bin | 87 -> 87 bytes |
-rw-r--r-- | tests/data/acpi/virt/SPCR | bin | 80 -> 80 bytes |
2 files changed, 0 insertions, 0 deletions
diff --git a/tests/data/acpi/virt/DBG2 b/tests/data/acpi/virt/DBG2 Binary files differindex 86e6314..0a05e1a 100644 --- a/tests/data/acpi/virt/DBG2 +++ b/tests/data/acpi/virt/DBG2 diff --git a/tests/data/acpi/virt/SPCR b/tests/data/acpi/virt/SPCR Binary files differindex 24e0a57..cf0f2b7 100644 --- a/tests/data/acpi/virt/SPCR +++ b/tests/data/acpi/virt/SPCR |