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authorRichard Henderson <richard.henderson@linaro.org>2021-01-29 12:15:58 -1000
committerRichard Henderson <richard.henderson@linaro.org>2021-03-06 11:45:21 -0800
commitdd2bb20e41d54410a685517f41ec86cc7d87b36b (patch)
tree100171d3ccaf6fcca9410912e813ff9b03a13ce6 /tcg
parent09c8b8b90d1bf8b5a48190f190440cf49b6cead9 (diff)
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tcg/tci: Merge basic arithmetic operations
This includes add, sub, mul, and, or, xor. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/tci.c75
1 files changed, 21 insertions, 54 deletions
diff --git a/tcg/tci.c b/tcg/tci.c
index 9efe69d..d0bf810 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -451,67 +451,70 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
*(uint32_t *)(t1 + t2) = t0;
break;
- /* Arithmetic operations (32 bit). */
+ /* Arithmetic operations (mixed 32/64 bit). */
- case INDEX_op_add_i32:
+ CASE_32_64(add)
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, t1 + t2);
break;
- case INDEX_op_sub_i32:
+ CASE_32_64(sub)
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, t1 - t2);
break;
- case INDEX_op_mul_i32:
+ CASE_32_64(mul)
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, t1 * t2);
break;
- case INDEX_op_div_i32:
+ CASE_32_64(and)
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, (int32_t)t1 / (int32_t)t2);
+ tci_write_reg(regs, t0, t1 & t2);
break;
- case INDEX_op_divu_i32:
+ CASE_32_64(or)
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, (uint32_t)t1 / (uint32_t)t2);
+ tci_write_reg(regs, t0, t1 | t2);
break;
- case INDEX_op_rem_i32:
+ CASE_32_64(xor)
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, (int32_t)t1 % (int32_t)t2);
+ tci_write_reg(regs, t0, t1 ^ t2);
break;
- case INDEX_op_remu_i32:
+
+ /* Arithmetic operations (32 bit). */
+
+ case INDEX_op_div_i32:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2);
+ tci_write_reg(regs, t0, (int32_t)t1 / (int32_t)t2);
break;
- case INDEX_op_and_i32:
+ case INDEX_op_divu_i32:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 & t2);
+ tci_write_reg(regs, t0, (uint32_t)t1 / (uint32_t)t2);
break;
- case INDEX_op_or_i32:
+ case INDEX_op_rem_i32:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 | t2);
+ tci_write_reg(regs, t0, (int32_t)t1 % (int32_t)t2);
break;
- case INDEX_op_xor_i32:
+ case INDEX_op_remu_i32:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 ^ t2);
+ tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2);
break;
/* Shift/rotate operations (32 bit). */
@@ -695,24 +698,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
/* Arithmetic operations (64 bit). */
- case INDEX_op_add_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_r(regs, &tb_ptr);
- t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 + t2);
- break;
- case INDEX_op_sub_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_r(regs, &tb_ptr);
- t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 - t2);
- break;
- case INDEX_op_mul_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_r(regs, &tb_ptr);
- t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 * t2);
- break;
case INDEX_op_div_i64:
t0 = *tb_ptr++;
t1 = tci_read_r(regs, &tb_ptr);
@@ -737,24 +722,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
t2 = tci_read_r(regs, &tb_ptr);
tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2);
break;
- case INDEX_op_and_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_r(regs, &tb_ptr);
- t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 & t2);
- break;
- case INDEX_op_or_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_r(regs, &tb_ptr);
- t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 | t2);
- break;
- case INDEX_op_xor_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_r(regs, &tb_ptr);
- t2 = tci_read_r(regs, &tb_ptr);
- tci_write_reg(regs, t0, t1 ^ t2);
- break;
/* Shift/rotate operations (64 bit). */