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| author | LIU Zhiwei <zhiwei_liu@c-sky.com> | 2021-06-24 18:50:19 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-06-29 10:04:56 -0700 |
| commit | 3d066e5d8008f8537e46f5ead37ecbdb4922a221 (patch) | |
| tree | 61f386da7c65aa5b1ddd8eb79e540ff9b84512ac /tcg | |
| parent | 5f5a05cdd9aa4dc3c3c4b062de2a8494f23337ed (diff) | |
| download | qemu-3d066e5d8008f8537e46f5ead37ecbdb4922a221.zip qemu-3d066e5d8008f8537e46f5ead37ecbdb4922a221.tar.gz qemu-3d066e5d8008f8537e46f5ead37ecbdb4922a221.tar.bz2 | |
tcg: Add tcg_gen_vec_add{sub}16_i32
Implement tcg_gen_vec_add{sub}16_tl by adding corresponding i32 OP.
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Message-Id: <20210624105023.3852-2-zhiwei_liu@c-sky.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/tcg-op-gvec.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index 515db12..7ddd56c 100644 --- a/tcg/tcg-op-gvec.c +++ b/tcg/tcg-op-gvec.c @@ -1742,6 +1742,20 @@ void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b) gen_addv_mask(d, a, b, m); } +void tcg_gen_vec_add16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b) +{ + TCGv_i32 t1 = tcg_temp_new_i32(); + TCGv_i32 t2 = tcg_temp_new_i32(); + + tcg_gen_andi_i32(t1, a, ~0xffff); + tcg_gen_add_i32(t2, a, b); + tcg_gen_add_i32(t1, t1, b); + tcg_gen_deposit_i32(d, t1, t2, 0, 16); + + tcg_temp_free_i32(t1); + tcg_temp_free_i32(t2); +} + void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b) { TCGv_i64 t1 = tcg_temp_new_i64(); @@ -1892,6 +1906,20 @@ void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b) gen_subv_mask(d, a, b, m); } +void tcg_gen_vec_sub16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b) +{ + TCGv_i32 t1 = tcg_temp_new_i32(); + TCGv_i32 t2 = tcg_temp_new_i32(); + + tcg_gen_andi_i32(t1, b, ~0xffff); + tcg_gen_sub_i32(t2, a, b); + tcg_gen_sub_i32(t1, a, t1); + tcg_gen_deposit_i32(d, t1, t2, 0, 16); + + tcg_temp_free_i32(t1); + tcg_temp_free_i32(t2); +} + void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b) { TCGv_i64 t1 = tcg_temp_new_i64(); |