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author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 16:25:22 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:21:30 +0100 |
commit | 379afdff47556f01e75ce2caffd7ae9efa4f1214 (patch) | |
tree | 5ef028391e8d09a07713234138ccd6ee6420e1ef /tcg/tci | |
parent | 753e42eada5c790bb3727c262f2e368e81cc788f (diff) | |
download | qemu-379afdff47556f01e75ce2caffd7ae9efa4f1214.zip qemu-379afdff47556f01e75ce2caffd7ae9efa4f1214.tar.gz qemu-379afdff47556f01e75ce2caffd7ae9efa4f1214.tar.bz2 |
tcg: Split out tcg_out_ext16u
We will need a backend interface for performing 16-bit zero-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci')
-rw-r--r-- | tcg/tci/tcg-target.c.inc | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 167f812..49a8394 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -604,6 +604,17 @@ static void tcg_out_ext16s(TCGContext *s, TCGType type, TCGReg rd, TCGReg rs) } } +static void tcg_out_ext16u(TCGContext *s, TCGReg rd, TCGReg rs) +{ + if (TCG_TARGET_REG_BITS == 64) { + tcg_debug_assert(TCG_TARGET_HAS_ext16u_i64); + tcg_out_op_rr(s, INDEX_op_ext16u_i64, rd, rs); + } else { + tcg_debug_assert(TCG_TARGET_HAS_ext16u_i32); + tcg_out_op_rr(s, INDEX_op_ext16u_i32, rd, rs); + } +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { @@ -762,7 +773,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */ - CASE_32_64(ext16u) /* Optional (TCG_TARGET_HAS_ext16u_*). */ CASE_64(ext32s) /* Optional (TCG_TARGET_HAS_ext32s_i64). */ CASE_64(ext32u) /* Optional (TCG_TARGET_HAS_ext32u_i64). */ CASE_64(ext_i32) @@ -845,6 +855,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_ext8u_i64: case INDEX_op_ext16s_i32: case INDEX_op_ext16s_i64: + case INDEX_op_ext16u_i32: + case INDEX_op_ext16u_i64: default: g_assert_not_reached(); } |