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authorRichard Henderson <richard.henderson@linaro.org>2021-01-24 10:57:01 -1000
committerRichard Henderson <richard.henderson@linaro.org>2021-02-05 10:24:14 -1000
commit13e71f08bf66646d9818f6430f337c965b241746 (patch)
tree063f44f3bffe4e2711ee683d23cb0a83b7892b9e /tcg/tci.c
parentc6fbea47664466e526e40300568324ef77e5f2cc (diff)
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tcg/tci: Make tci_tb_ptr thread-local
Each thread must have its own pc, even under TCI. Remove the GETPC ifdef, because GETPC is always available for helpers, and thus is always required. Move the assignment under INDEX_op_call, because the value is only visible when we make a call to a helper function. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210204014509.882821-6-richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci.c')
-rw-r--r--tcg/tci.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/tcg/tci.c b/tcg/tci.c
index 3fc82d3..b3f9531 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -57,6 +57,8 @@ typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong);
#endif
+__thread uintptr_t tci_tb_ptr;
+
static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
{
tci_assert(index < TCG_TARGET_NB_REGS);
@@ -526,16 +528,13 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
#endif
TCGMemOpIdx oi;
-#if defined(GETPC)
- tci_tb_ptr = (uintptr_t)tb_ptr;
-#endif
-
/* Skip opcode and size entry. */
tb_ptr += 2;
switch (opc) {
case INDEX_op_call:
t0 = tci_read_ri(regs, &tb_ptr);
+ tci_tb_ptr = (uintptr_t)tb_ptr;
#if TCG_TARGET_REG_BITS == 32
tmp64 = ((helper_function)t0)(tci_read_reg(regs, TCG_REG_R0),
tci_read_reg(regs, TCG_REG_R1),