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| author | Paolo Bonzini <pbonzini@redhat.com> | 2023-10-19 12:46:43 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-10-22 16:32:28 -0700 |
| commit | 93c86ecd77a308e023fe158936abc78ea01072d5 (patch) | |
| tree | 8a96cfd8a4463e3d4fc3e07d776a56b0d769017c /tcg/tcg-op.c | |
| parent | 46c684c86260489eef485311aa76bb7aa94cedfc (diff) | |
| download | qemu-93c86ecd77a308e023fe158936abc78ea01072d5.zip qemu-93c86ecd77a308e023fe158936abc78ea01072d5.tar.gz qemu-93c86ecd77a308e023fe158936abc78ea01072d5.tar.bz2 | |
tcg: add negsetcondi
This can be useful to write a shift bit extraction that does not
depend on TARGET_LONG_BITS.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20231019104648.389942-15-pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg-op.c')
| -rw-r--r-- | tcg/tcg-op.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index b4dbb2f..828eb9e 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -291,6 +291,12 @@ void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret, } } +void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret, + TCGv_i32 arg1, int32_t arg2) +{ + tcg_gen_negsetcond_i32(cond, ret, arg1, tcg_constant_i32(arg2)); +} + void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) { if (arg2 == 0) { @@ -1602,6 +1608,12 @@ void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret, } } +void tcg_gen_negsetcondi_i64(TCGCond cond, TCGv_i64 ret, + TCGv_i64 arg1, int64_t arg2) +{ + tcg_gen_negsetcond_i64(cond, ret, arg1, tcg_constant_i64(arg2)); +} + void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { |