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author | Richard Henderson <rth@twiddle.net> | 2012-03-25 22:43:17 +0200 |
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committer | Richard Henderson <rth@twiddle.net> | 2012-09-21 22:02:20 +0200 |
commit | 26adfb759c4c6ad42958c365812945316f3468ae (patch) | |
tree | eeef20e4654c2dd2da7456f626fa120f36a74f68 /tcg/sparc | |
parent | 375816f84b820e087fab8ff584bd5b8f27811cdb (diff) | |
download | qemu-26adfb759c4c6ad42958c365812945316f3468ae.zip qemu-26adfb759c4c6ad42958c365812945316f3468ae.tar.gz qemu-26adfb759c4c6ad42958c365812945316f3468ae.tar.bz2 |
tcg-sparc: Add %g/%o registers to alloc_order
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/sparc')
-rw-r--r-- | tcg/sparc/tcg-target.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index d401f8e..03c385a 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -78,12 +78,25 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_L5, TCG_REG_L6, TCG_REG_L7, + TCG_REG_I0, TCG_REG_I1, TCG_REG_I2, TCG_REG_I3, TCG_REG_I4, TCG_REG_I5, + + TCG_REG_G2, + TCG_REG_G3, + TCG_REG_G4, + TCG_REG_G5, + + TCG_REG_O0, + TCG_REG_O1, + TCG_REG_O2, + TCG_REG_O3, + TCG_REG_O4, + TCG_REG_O5, }; static const int tcg_target_call_iarg_regs[6] = { |