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author | Richard Henderson <richard.henderson@linaro.org> | 2023-03-24 13:02:59 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-06-05 12:04:28 -0700 |
commit | 238f43809a85a47cfbbc2e1d6aff4640fec30328 (patch) | |
tree | d60c778ef821469bde1ba5ed8fe18169fc2941e6 /tcg/sparc64 | |
parent | ff0c61bf35fbeffd5c0f85a0b67b49ccb65e04f5 (diff) | |
download | qemu-238f43809a85a47cfbbc2e1d6aff4640fec30328.zip qemu-238f43809a85a47cfbbc2e1d6aff4640fec30328.tar.gz qemu-238f43809a85a47cfbbc2e1d6aff4640fec30328.tar.bz2 |
tcg: Widen CPUTLBEntry comparators to 64-bits
This makes CPUTLBEntry agnostic to the address size of the guest.
When 32-bit addresses are in effect, we can simply read the low
32 bits of the 64-bit field. Similarly when we need to update
the field for setting TLB_NOTDIRTY.
For TCG backends that could in theory be big-endian, but in
practice are not (arm, loongarch, riscv), use QEMU_BUILD_BUG_ON
to document and ensure this is not accidentally missed.
For s390x, which is always big-endian, use HOST_BIG_ENDIAN anyway,
to document the reason for the adjustment.
For sparc64 and ppc64, always perform a 64-bit load, and rely on
the following 32-bit comparison to ignore the high bits.
Rearrange mips and ppc if ladders for clarity.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/sparc64')
-rw-r--r-- | tcg/sparc64/tcg-target.c.inc | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index 48efd83..6c60657 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -1063,8 +1063,12 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h, /* Add the tlb_table pointer, creating the CPUTLBEntry address into R2. */ tcg_out_arith(s, TCG_REG_T1, TCG_REG_T1, TCG_REG_T3, ARITH_ADD); - /* Load the tlb comparator and the addend. */ - tcg_out_ld(s, addr_type, TCG_REG_T2, TCG_REG_T1, cmp_off); + /* + * Load the tlb comparator and the addend. + * Always load the entire 64-bit comparator for simplicity. + * We will ignore the high bits via BPCC_ICC below. + */ + tcg_out_ld(s, TCG_TYPE_I64, TCG_REG_T2, TCG_REG_T1, cmp_off); tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_T1, TCG_REG_T1, add_off); h->base = TCG_REG_T1; |