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authorRichard Henderson <richard.henderson@linaro.org>2023-04-05 18:56:28 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-04-23 08:46:45 +0100
commitb9bfe000f954e1defefb4c917f98bf82c337144b (patch)
tree681e36737e9a936a5c9a3213aa57c91b44478153 /tcg/s390x
parent9c6aa274a494ce807e998a3652fa16a3d2da4387 (diff)
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tcg: Split out tcg_out_extu_i32_i64
We will need a backend interface for type extension with zero. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/s390x')
-rw-r--r--tcg/s390x/tcg-target.c.inc10
1 files changed, 6 insertions, 4 deletions
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 60deaa9..e17d000 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1127,6 +1127,11 @@ static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg dest, TCGReg src)
tcg_out_ext32s(s, dest, src);
}
+static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg dest, TCGReg src)
+{
+ tcg_out_ext32u(s, dest, src);
+}
+
static void tgen_andi_risbg(TCGContext *s, TCGReg out, TCGReg in, uint64_t val)
{
int msb, lsb;
@@ -2529,10 +2534,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
}
break;
- case INDEX_op_extu_i32_i64:
- tcg_out_ext32u(s, args[0], args[1]);
- break;
-
case INDEX_op_add2_i64:
if (const_args[4]) {
if ((int64_t)args[4] >= 0) {
@@ -2630,6 +2631,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext32s_i64:
case INDEX_op_ext32u_i64:
case INDEX_op_ext_i32_i64:
+ case INDEX_op_extu_i32_i64:
default:
g_assert_not_reached();
}