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author | Richard Henderson <richard.henderson@linaro.org> | 2017-09-11 11:25:55 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2017-09-17 06:52:19 -0700 |
commit | ccb1bb66ea2a42e773bfa04178d8b383ff86d4d8 (patch) | |
tree | 24ed8314b2970738371674ded31df4e52e986f56 /tcg/s390/tcg-target.inc.c | |
parent | be0f34b5840312bbe9627c2b9f68a25f32903dae (diff) | |
download | qemu-ccb1bb66ea2a42e773bfa04178d8b383ff86d4d8.zip qemu-ccb1bb66ea2a42e773bfa04178d8b383ff86d4d8.tar.gz qemu-ccb1bb66ea2a42e773bfa04178d8b383ff86d4d8.tar.bz2 |
tcg: Remove tcg_regset_clear
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/s390/tcg-target.inc.c')
-rw-r--r-- | tcg/s390/tcg-target.inc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index e7ab8e4..01baa33 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -413,12 +413,12 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, break; case 'a': /* force R2 for division */ ct->ct |= TCG_CT_REG; - tcg_regset_clear(ct->u.regs); + ct->u.regs = 0; tcg_regset_set_reg(ct->u.regs, TCG_REG_R2); break; case 'b': /* force R3 for division */ ct->ct |= TCG_CT_REG; - tcg_regset_clear(ct->u.regs); + ct->u.regs = 0; tcg_regset_set_reg(ct->u.regs, TCG_REG_R3); break; case 'A': @@ -2522,7 +2522,7 @@ static void tcg_target_init(TCGContext *s) tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff); tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff); - tcg_regset_clear(tcg_target_call_clobber_regs); + tcg_target_call_clobber_regs = 0; tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R0); tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R1); tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R2); @@ -2535,7 +2535,7 @@ static void tcg_target_init(TCGContext *s) /* The return register can be considered call-clobbered. */ tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14); - tcg_regset_clear(s->reserved_regs); + s->reserved_regs = 0; tcg_regset_set_reg(s->reserved_regs, TCG_TMP0); /* XXX many insns can't be used with R0, so we better avoid it for now */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); |